This is the structure of average current mode control (source here).

enter image description here

Please look at signal \$V_{com}\$ at the positive input of PWM modulator. For proper operation, in steady state the magnitude of \$V_{com}\$ should be in range peak to peak of ramp signal. Is there a clear procedure (almost like step by step) to guarantee this?

I tried to simulate this and even using simple integral compensation but \$V_{com}\$ is always out of range of ramp signal.

This is my simulation result with target 3V input and 2V output.

enter image description here

enter image description here

  • \$\begingroup\$ Show your simulation schematic too please. \$\endgroup\$
    – Andy aka
    Apr 2 '18 at 15:10
  • \$\begingroup\$ And what about the op-amps - were they OK on a single 5 volt rail? And why is your reference voltage 2 volts? \$\endgroup\$
    – Andy aka
    Apr 2 '18 at 17:28
  • \$\begingroup\$ @Andyaka: I don't understand your question about OpAmp. I used reference 2V because I want output to be 2V. \$\endgroup\$
    – emnha
    Apr 2 '18 at 19:06
  • \$\begingroup\$ What op-amps are they? \$\endgroup\$
    – Andy aka
    Apr 3 '18 at 8:04

You have both fets driven by the same control signal so they're 'shorting'. Invert the lower fet.

You also have a current source load. Your controller therefore can't regulate the current - it's being 'defined' by the current source. Change to an R load.

  • \$\begingroup\$ it's a PMOS & NMOS ==> OK for sims like this -- not OK in real life as there will be tremendous shoot through current spikes. Even though the load is a current source, it should still regulate (there is a C at the output also). \$\endgroup\$
    – jp314
    Jan 17 at 22:47

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