# LTSpice arbitrary voltage block (bv) simulating full wave bridge rectifier

I'm creating a LTSpice simulation. I need a voltage source that looks like the output of a full wave bridge rectifier. The simulation includes a sine voltage source (voltage block) line to generate an "Input Voltage" and an arbitrary voltage (bv block) Rectified which uses the abs() function to "flip" the negative part of the input voltage waveform, thus creating the "Output Voltage" that drives the circuit.

Running the simulation generates an error message "Unknown symbol: line" (Same problem if I use "V1" instead of "line" in the bv block formula.)

• Did you mean V(line) ? – PlasmaHH Apr 3 '18 at 12:19
• @PlasmaHH Don't understand your question. The formula in the bv block, top left, is V=(abs(line)) as stated in the LTSpice drawing. Are you saying the formula should be V=(abs(v(line)))? – HiTechHiTouch Apr 3 '18 at 15:12
• @PlasmaHH -- You got it... needed v(line) not plain old line. Thanks. If you want credit, conjurer an answer so I can accept it. – HiTechHiTouch Apr 3 '18 at 15:15
• With the risk of drawing gods' wrath, why didn't you just use a diode bridge? Or, to avoid the possible dynamic range loss of the behavioural source, you could have used an E-, or G-source (preferably, terminated with an appropiate resistor), with table(-1k,1k,0,0,1k,1k), but this is just a suggestion. – a concerned citizen Apr 4 '18 at 7:04

You can take the voltage of a node, a voltage difference between nodes or a current through a device as input of a B-source.

The syntax to access these are:

• V(node) for a voltage of a node, so V(line) in your example
• V(node1, node2) for a voltage difference between node 1 and node 2 (node 1 - node 2)
• I(component) for example I(V1) - note however, that there is no immediate feedback as detailed in the help

Detailed description for device currents:

However, it is assumed that the circuit element current is varying quasi-statically, that is, there is no instantaneous feedback between the current through the referenced device and the behavioral source output. Similarly, any ac component of such a device current is assumed to be zero in a small signal linear .AC analysis.

The I() and V() syntax is required as you can create a node which is named R1 and a resistor which is named R1 (I do not promote such a naming scheme, but it is possible), so LTSpice cannot easily decide which one you want.