I don't have an option here in my country , No non-volatile sram and i need it for my project . i designed a circuit for that and need anyone's opinion if it's ok or need a correction .
Given the specs say
Data retention current: 1.0 μA (MAX.) (V = 3 V, T = 25°C)
I see at least three problems:
The two 1 kΩ at the battery transistor will draw too much current when VCC is out. 40 kΩ each seems more appropriate to me. (2.2V / (1µA / 25)) ~= 88 kΩ; 40 kΩ should be good enough.
When the battery is half used its voltage will be below the minimum data retention voltage, plus you will have a (small) voltage drop at the transistor. This may or may not work, or, worst, it may work when you test it and stop working at a later time.
The 2N3904 will not cut until VCC is below 0.7~0.8 V. If VCC goes down slowly (electrolytic capacitors, ...) there will be a time during which both this transistor and the one feeding current from the battery will be active. In this situation the third transistor, the bottom one, will probably work in reverse and feed current from the battery to VCC (VCC is now 1 or 2 volts below Vbat). This will drain the battery through the 1 kΩ. In the worst scenario the leak will keep VCC above .7 V and, because it will never stop, it will drain the battery in a few days.
I'd suggest changing the two resistors at the base of the 2N3904 to a divisor that will cut it somewhere between 3 and 4 volts at VCC, possibly adding a third resistor from the emitter of the bottom transistor to introduce a Smith Trigger effect and avoid any possibility of oscillations during the transition.
this is my new design
- This design draws less current by using voltage divider at the base of Q3 , the current = 4 microamps when VCC =5v , Q3 won't work below 4v at VCC rail and that makes the transition between vcc and battery happens when Q3 is off .
- 1N5817 has a low forward voltage drop ** (.450 v @ 1A datasheet)** ,
after bench testing it, this Diode conducts 1 mAMP at .2 volts and
that makes using battery at it's full life (ex.. if the battery
voltage = 3v the point D will be 2.8v and if the battery reached the cutoff voltage (2.25v)the point D will be 2.05v .
Counting the expected CR2032 life if the capacity = (220mAH
bat capacity / circuit current
the ram retention supply current = 1 uAMP at temp 25c i'll use 10 uAMP as a safe margin in case the circuitry works in higher
220mAH / .010 = 22000 H / 24 = 916 days
I wasn't sure if I should post an answer or comment but the explanation is to long to be included in a comment to the Ahmed answer.
First , I would avoid any not needed high impedance point. You want your data to survive for 3 years, anything can happen, a voltage spike , a gsm phone or a piezo lighter used near your board. I would use lower values for R25..R27. none of them have nothing to do with the power consumption but higher values can lead to a higher noise sensitivity.
In fact you should drop R27 because the circuit should be resilient to transitory out of the standby events that might happen on power off/on or due unwanted voltage spikes.
The datasheet I found states maximum 1 uA for 25 degrees Celsius, 3 for 40 and 15 over the temperature range at 3v Vddr, I wouldn't worry to much about that, you won't keep your board for three years at 80C. 5uA overall would be fine for an approximation. Rather a temporary high current (due a high temperature) combined with the high value of R27 can lead to VDD to drop under the retention voltage.
I would use R24 = 100k, R25 = 15.1k, R26 = 20k and R27 = 0
I don't see a dependence voltage to current consumption in the datasheet.