Backup battery circuit with charging

I am trying to implement a secondary battery in one of my projects. When the main battery (24 V) dies, the 3.3 V battery takes over and the system operates in limp mode (some emergency functions).

I am planning to connect the batteries like this, as my system runs on 3.3 V and the secondary battery I'm going to use is a LiFePO4 cell (3.2 V nominal). This way, my secondary also gets charged (to a safe 3.3 V) when main battery is available.

My load is hardly 500 mA with full functioning, and 200 mA in limp mode. Is there anything I'm missing here? Will the LDO be fine when the main battery is not present? I'm attaching the LDO's functional diagram as well.

I checked the or-ing diode methods and LT's powerpath ICs, but I want the circuit to be as simple as possible. LT has supply issues as well in my country, so they have to be imported.

• Is the 1 ohm resistor for limiting the charging current in case of depleated battery? Commented Apr 5, 2018 at 13:46
• Yup, just to limit the charging current Commented Apr 5, 2018 at 16:12
• unless you already have a 7V buck converter and don't want to buy/build a new converter, you will have greater efficiency if you use a 5V or even 4V converter before your 3.3V LDO. // When drawing 200mA in limp mode, your 1 Ohm resistor will drop 200mV, leaving you with 3.2-.2 = 3.0 V. Is that sufficient? Commented Feb 7, 2021 at 18:20
• Your circuit is missing a Smart battery charger IC that detects a full charge then shuts off so the the battery does not over-charge and explode. A Smart battery charger IC also detects a faulty battery and refuses to charge it (explode it). Commented Mar 26, 2022 at 15:50

I'm not very familiar with LiFe technology, but a simple resistor in series with the LiFe battery might not be ideal. While charging, depending on the current drawn by the LiFe battery, the series resistor will generate a voltage drop that may fall below the nominal voltage of your battery thus reducing its usable capacity and life span. Same matter when the main battery is removed, you should double check the low voltage supply limit of your load, for the voltage drop across the series resistance may be too high.

Perhaps you could use an integrated LiFe IC charger which will go through the constant current / constant voltage cycle. If you reckon the circuitry simple enough it will ensure proper charging of your battery.

As for the LDO, I am not sure what will be its behavior regarding the LiFe powering up the output pin. But I guess a diode wouldn't do the trick. You could put a N type MOSFET whose gate would be driven by the LDO. With a pull-down resistor to ground, when the LDO is not powered by the main battery, the MOSFET will turn OFF and prevent the LiFe from damaging the LDO.

simulate this circuit – Schematic created using CircuitLab

Side note about the buck converter : why choose a 7V output converter instead of a 5V one? Does your LDO need a voltage drop larger than 1.7 V? Again, just a minor question that does not help with your question.

• Well my circuit needs a 5V supply as well, so I have another 5V LDO after the buck stage. That's why its 7V. Commented Apr 6, 2018 at 6:49
• At 200mA, the series resistor would drop 0.2V, the output being 3.1V which is okay for the limp mode (since most critical operations are stopped). While charging, the resistor would allow limit the max charge current to a safe level, and will ultimately (but slowly) become equal to 3.3V. Not being able to utilise the full capacity is also not a problem for me, and LiFe charge >80% at 3.3V which is enough for my application. Commented Apr 6, 2018 at 6:59

This is more a comment and suggestion to the @François Charles-Orszag answer. First of all, im also not very familiar with the LiFe technology and i am not totally sure if LDO will work fine.

But i am sure that diode connected NMOS from mentioned answer will not do the job.

I can see two issues in that circuit:

1. There is no voltage regulation at the output of the NMOS. In that configuration transistor is very poorly drive and we will see huge, load dependent voltage drop across it. In my simulations im observing 2.6V drop for 100mA load and generic 2N7002 transistor.

To ensure stable 3.3V at the output of the transistor i recommend to use an adjustable LDO and make measurement directly across the load.

1. NMOS will not cut off LDO, when there is no input voltage. Current can still flow through the positively polarized body diode, possibly damaging LDO.

To prevent that from happening, NMOS has to be connected other way around - source and body to the LDO output and drain to the load.

Here is circuit that fixes those issues, and works in my sims: