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I am making a 12 V battery charger getting power from 220V AC. The topology is Half bridge with capacitor voltage divider, as shown in the SG3525 datasheet.

While initial testing on vero-board, The voltage at the midpoint of half bridge remains high after the pulse of the high MOSFET and remains low after the pulse of low MOSFET. This makes it a 50% square-wave regardless of the duty cycle from SG3525A. A similar square wave appears on the secondaries.

I want to have control on output voltage and current, so need to have duty cycle in my (SG3525A's) hand.

Can anyone figure out what's causing the problem??

The gate driver worked so perfectly, I was amazed myself. Only it had quite an overshoot at edges and lots of ringing. Both of these problems went away when I connected a 3.3k resistor between gate and source and a 33 Ohm in seires with gate.

The specs I am working with are as follows.

Vin: 220 VAC, 50 Hz

Vout: 12-14 V

Iout: 0-4 A

Topology: Half bridge with forward converter

PWM controller: SG3525A

Frequency: 55 kHz

Switches: IRF840

Core: #40 EE Ferrite

Primary: 60 turns of SWG25 wire

Secondary: 10+10 turns center tapped of 6xSWG25 wires

Aux: 10 turns SWG25 wire

Voltage divider capacitors: 220 uF each, with 470 kOhm in parallel to each

When testing the circuit with resistive load on Aux, 24 V DC at input and about 40% duty cycle on the SG3525A, I get the following waveforms. The Aux has just a full-wave rectifier and a 100 uF filter capacitor.

Edit: I placed a resistor in series with the primary winding of T2, so now I have the current waveforms for the primary. The voltage and current waveforms for the primary and secondary of T2, when analyzed together, may give a better picture of what's happening in the transformer.

In the following, yellow is gate-source voltage of lower MOSFET, blue is voltage at half bridge mid point (probe at 10x). Aux is loaded with 100 mA. half bridge center point under load

In the following, yellow is gate-source voltage of lower MOSFET, blue is voltage at capacitors midpoint (probe at 10x). Aux is loaded with 100 mA. capacitor center point under load

In the following, yellow is gate-source voltage of lower MOSFET, blue is voltage at midpoint of half bridge (probe at 10x). No load is connected. half bridge center point under load

The following diagram shows primary current and voltage at different duty cycles under moderate load. The voltage probe is at 10x setting. primary voltage and current

The following diagram shows primary and secondary voltage at different duty cycles under moderate load. A resistive load is connected to the secondary, so the current is same as the voltage. The secondary voltage probe is at 10x setting. primary and secondary voltage

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  • \$\begingroup\$ Do I have to set bounty to attract people who actually know how a transformer works? I only have 79 points. \$\endgroup\$ – Abdullah Baig Apr 16 '18 at 10:42
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I do not know what physics universe that you live in but the Vin to that chip can be no more than 40V DC. It is not suitable for connection to 240VAC. If you have not already burnt the chip I would guess that it will soon be cooked.

I saw nothing in the data sheet that would indicate that the above circuit you show is suitable for connection to 240VAC. If there is more to your circuit then you are going to have to show that otherwise the question is unanswerable other than to watch for smoke.

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  • \$\begingroup\$ Take it easy bro. The SG3525A is supplied with 15V DC. Currently it comes from a DC power supply. When the circuit will be complete, it will come from the Aux winding. The half-bridge will get the rectified 220VAC. \$\endgroup\$ – Abdullah Baig Apr 8 '18 at 18:00
  • \$\begingroup\$ You have a lot more to show then if you expect to be able to any help at all. \$\endgroup\$ – Michael Karas Apr 8 '18 at 18:06
  • \$\begingroup\$ Sorry, my bad. I just don't have a schematic at this stage. Will just clarify things on yhe go. \$\endgroup\$ – Abdullah Baig Apr 8 '18 at 18:20
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The voltage at the midpoint of half bridge remains high after the pulse of the high MOSFET and remains low after the pulse of low MOSFET. This makes it a 50% square-wave regardless of the duty cycle from SG3525A.

It appears to me that you are not commutating the magnetic field in your T1 transformer. You cannot expect a transformer to work with a variable duty cycle (aka an average value of DC) unless you ensure (by extra circuitry usually but not exclusively on the driver secondary windings) that the volt-seconds balance is maintained.

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  • \$\begingroup\$ Thanks for the reply. The yellow signals in the oscilloscope are the voltage at the gate of the MOSFET. It is clearly visible that this voltage (secondary of the T1) comes sharply to zero, correctly following the primary voltage (coming from the SG3525A). \$\endgroup\$ – Abdullah Baig Apr 8 '18 at 18:23
  • \$\begingroup\$ I think the transformer is well commutated. Because the PWM comes alternately in positive and negative direction. So there is no DC component. (clearly evident from oscilloscope yellow waveforms) \$\endgroup\$ – Abdullah Baig Apr 8 '18 at 18:24
  • \$\begingroup\$ Are you not wanting to control the duty cycle though? You said "This makes it a 50% square-wave regardless of the duty cycle from SG3525A". If you vary the duty cycle you will not get commutation. I'm not that familiar with the SG3525 - does it alter the width of the +pulse then apply the same width on the -pulse but, because both are the same width (duty cycle controlled), the commutation is OK? \$\endgroup\$ – Andy aka Apr 8 '18 at 18:42
  • \$\begingroup\$ Thanks for your sustained interest in this topic. The SG3525A has two outputs, A and B. The PWM comes alternately on A and B. Same pulse width. One pulse on A, next pulse on B, then next on A, then on B. If you connect the A and B to the terminals of a transformer (as done in the first picture), it sees like it is getting a positive and negative pulses of equal width. That width is what I mean by duty cycle here. \$\endgroup\$ – Abdullah Baig Apr 8 '18 at 18:50
  • \$\begingroup\$ Okay. Maybe the average to your output transformer is not zero and this walks the capacitor voltages to one side or the other? Interesting, I’ll have to study that chip. \$\endgroup\$ – Andy aka Apr 8 '18 at 18:58

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