Here in an interesting discussion about MOV specifications

If I want to protect a 3.3V circuit tolerant to 5V voltage against ESD, I can select a little fuse MOV for example V3.5MLA0603.

I want to protect some SMBUS lines (connected to a battery bms) against ESD and to SMBUS MCU pins (5V tolerant).

Here are characteristics :

enter image description here

Here are its I/V curve : enter image description here

We can see nominal voltage (Breakdown voltage ? ) is in range [3.7; 7]V

From datasheet characteristics is V3.5MLA0603 a safe choice for my application?

I would say no, but I'm sure at 100%. With 7V applied to my circuit (@1mA), I think it will be seriously damaged. But, may be my understanding of max clamp voltage must be pratically interpreted in a different way.

  • \$\begingroup\$ Only you appear to have all the cards. I see an MOV but I see nothing that it is meant to protect. \$\endgroup\$ – Andy aka Apr 12 '18 at 8:29
  • \$\begingroup\$ I edited post, typical application is protection of some SMBUS lines (connected to a battery bms) against ESD and to SMBUS MCU pins (5V tolerant). \$\endgroup\$ – rem Apr 12 '18 at 8:37
  • \$\begingroup\$ The devil is in the detail. \$\endgroup\$ – Andy aka Apr 12 '18 at 8:41

Protection of signal lines for ESD is better handled by components with much faster turn-on times than MOVs. You should be looking instead at components more like tranzorbs.

ESD voltage spikes have extremely fast rise times and one of your best strategies is to use a multi-forked approach.

First off consider carefully the types of interfaces that you use for your off board interconnections. Connector types, shielding and signalling impedance are very important considerations. You need to be aware that some interface protocols are just not going to be suitable to the types of things needed to harden a product against ESD.

Next off include some capacitance on I/O lines to absorb the initial energy of ESD pulse. This changes rise time of the pulse (in conjunction with any signal wire impedance or series resistance you may choose to add and the capacitance value of the capacitor to ground). The best way to increase the signal line impedance coming from outside your board is to pass the signal through a ferrite bead type component. These will increase impedance significantly with increased frequency of the disturbance signalling. The fast rise time of ESD pulses has significant high frequency content.

The tranzorb you select will never be as close to the 5V cutoff level on a 3.3V bus signal. When using an absorptive clamp device you are doing pretty good if you can realize a clamping at 2x or 3x the actual signalling levels on the interface.

If you have multiple signal lines to protect you can share the energy absorptive device by applying diodes from the signal lines to a single tranzorb thus saving cost.

If you need much tighter clamping than a tranzorb can provide then you want to consider using clamping diodes on the signal lines that shunt the ESD energy into power rails. Power rails typically have lots of capacitance that can absorb a lot of energy and still clamp a signal line to a safe voltage range.

You would do well to look at the schematics for some USB type products to see what is typically done to protect such interfaces from ESD. Ferrites, common mode chokes and clamp diodes to supply rails are typical while at the same time not compromising the normal functional bandwidth of the signalling protocol. You could apply these techniques to your SMBus/I2C interface. The USB hub chip manufacturers often have detailed reference schematics that show the types of things I am referring to here.

|improve this answer|||||

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.