For a more precise measurement of a battery voltage I'd like to apply auto adjustment. The input voltage ranges from 2.5V-4.2V (single cell) to 20V-72V (module). At the moment the input voltage is divided by ~30 with a differential OpAmp and fed into a 24bit/512kSPS ADC (ADS127L01).

Since the voltage for single cells does only use a fraction of the full scale range I'd like to adjust the circuit. During my research I found a rather promising solution: http://www.electronicdesign.com/test-measurement/optimize-high-voltage-measurements-self-adjusting-attenuator

I built the schematic with LTspice and simulated the desired output voltage which looks quite good. Nevertheless, I'm not quite sure because the diodes are not simulated correctly. Can anybody explain how this should work? As soon the corresponding OpAmp saturates (eg. -5V), the voltage at the negativ input pin increases and can cause damage to the OpAmp as it exceeds the positiv voltage supply. How should this be avoided by the two diodes in parallel to the resistor?

How about accuracy? I also run a noise analysis in spice but as I said, I highly doubt the results are correct. The result would be around 10nV/sqrt(Hz) for the sample rate of ~500kSPS. Is it recommended to apply aditional differential filters, also to match with the differential inputs of the ADS127L01?

Furthermore, I have a question on extending this circuit for even higher voltages up to 1000 V. If I use R4 (eg. 10Meg) and adjust all other resistors so that the stages match with ranges of eg. 100V-300V, 300V-600V and 600V-1000V this should work as well?


simulate this circuit – Schematic created using CircuitLab enter image description here

I'm looking forward to your replies!

  • \$\begingroup\$ What's the minimum voltage you want to support? I'm getting the idea that you want to support up to 1000 V. Fine. But can you accept a minimum voltage of 2.5 V? Or do you have to measure down to an exact 0? Oh. Never mind. Your sample rates appear to be very high. What I was thinking of isn't appropriate. \$\endgroup\$ – jonk Apr 13 '18 at 20:48
  • \$\begingroup\$ Looks like a poor-man's auto-ranging. How about an LTC6910-2 programmable gain amplifier (PGA) to provide gain under control of a 3-bit input code, the LTC6910-2 provides gain in binary-weighted increments. A comparator would detect overflow. (gain is set to 1, 2, 4, 8, 16, 32 or 64) \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Apr 13 '18 at 20:58
  • \$\begingroup\$ 2.0V or 2.5V is perfectly fine. Its important to detect „no cell“ which means voltage below this threshold. On pack level the minimum voltage should not drop below 100V. The idea is to have one layout and either equip for cell level OR cell + module level OR pack level \$\endgroup\$ – MFH Apr 13 '18 at 21:02
  • \$\begingroup\$ Read Accuracy, Trueness, Precision, Repeatability, etc and tell me what you require for all of these over that huge range. \$\endgroup\$ – jonk Apr 13 '18 at 21:05
  • \$\begingroup\$ If you can reach 24 bit resolution is questionable. The range 2.5V-4.2V multiplied by 8 gives 20V-33.6V and not 20V-70V? Your DAC has a differential input, would measure against a reference voltage be a solution? \$\endgroup\$ – Kitana Apr 13 '18 at 21:20

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Browse other questions tagged or ask your own question.