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I am trying to interface TI's ADS8548 ADC with Xilinx XC3S700AN FPGA to get the coordinates from an accelerometer.

When I went trough the spec of the ADC, I found that pin20 is a muxed pin for DB11/REFBUFEN.

The DB11 is for parallel interface (which I prefer in my application), but it's been mentioned in the datasheet that REFBUFEN should be kept low if Internal Reference Voltage is to be used.

Yes I want to make use of both the parallel interface for output and the internal reference voltage that can be enabled using the REFEN pin. Is that possible?

If I pull the REFBUFEN down hardwired, does it affect the digital output through parallel interface from the ADC in anyways?

Or if it can be done only by configuring the register named CONFIG, please explain in detail the interface needed to access the register from FPGA or any host in general. I went through the datasheet, but was not able to find any details on this.

I prefer this ADC because I want to do simultaneous sampling on all eight channels at relatively small sampling rate of 600 ksps.

Please let me know if the details I have provided are not sufficient for you guys to help.

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Yes, you would need to use the Configuration Register to activate the internal reference. You would need to perform two 16-bit writes to the device using your parallel bus.

\$\overline{HW}/SW = 1\$ (tied high)

\$\overline{PAR}/SER = 0\$ (tied low)


First

\$\overline{CS} = 0\$

\$\overline{WR} = 0\$

\$DB[15:0] = ??????????????XX\$


then

\$\overline{CS} = 0\$

\$\overline{WR} = 1\$

\$DB[15:0] = XXXXXXXXXXXXXXXX\$


then

\$\overline{CS} = 0\$

\$\overline{WR} = 0\$

\$DB[15:0] = 10?XXX??????????\$


Where X is a don't care and ? means you will need to decide what is correct based on your application.

From the datasheet:

Configuration Timing Diagram

See "Software Mode" on Page 29 and "Configuration (CONFIG) Register" on Page 31 for more information.

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