# Output related to input in diode circuit

I have to find the output voltage Uo related to the input voltage Ui knowing that the input values range from -10V to 30V. I started by assuming that D1 is reversed biased. But then how do i know if D2 is forward or reversed biased? I think i have to take that D2 is forward biased so i can find the Voltage at the node with resistors 10kΩ-10kΩ-10kΩ and then be able to define the range where D1 conducts. However, i am not sure. All diodes are ideal. Any help is appreciated! Thanks in advance! • You should assume that every node is at 0V at the start, except the ones with voltage sources. After that, you go step by step. For example, since there is 10V on the cathode of D2 and Vo=0V at the start, you should assume that D2 is reversed bias, then Vo=0V. However, Vi=10V and the cathode of D1 is 0V, so the diode is getting forward biased and you can assume the other node is 10V. You go like that until there is no voltage contradiction. – lucas92 Apr 16 '18 at 13:53

Well, I’m assuming those are ideal diodes, right? Start by simplifying your thoughts. D2 in series with 10V is the same as a diode conducting only above 10V, let’s call it D2’. So, before D2’ reaches 10V this is a non-conductive path. This means you can ignore the third 10K resistor since it doesn’t have current. The first two resistors act as a voltage divider, so D2’ will conduct only when the input voltage is 20V, which gives 10V over D2’, are you following? After 20V, D2’ starts conducting and the third resistor cannot be ignored anymore. But this part is easy too. Since D2’ is now conducting, any further raise in the input voltage is now clamped on D2’ and it stays at 10V.

• Thanks, I forgot about the clamping effect with that particular topology! I was somehow more interested on the voltage calculation at the node where all the resistors meet. – Simon Marcoux Apr 16 '18 at 14:35
• Well, first i wanna thank you for the detailed and easy explanation!I understood everything. I just have one question. We started by ignoring D2 cause it conducts only when its anode is above 10V(when at start it is at 0V if i am not mistaken). I got this. After that we got that D1 conducts and we continued the analysis with the voltage divider. This is the only point i didn't understand well. Why D1 conducts during the whole analysis? Our input voltage's value ranges from -10V to 30V. I mean, if we have Ui=-10V then why D1 is forward biased? – MJ13 Apr 16 '18 at 14:47
• @MJ13 You’re correct, I didn’t mention it, I’m sorry. Below 0V the output is constant at 0V :) – PDuarte Apr 16 '18 at 14:57
• @MJ13 That’s it – PDuarte Apr 16 '18 at 15:09
• It exists but now it’s not a half divider circuit and you must consider the third resistor as if it were connected to a 10V power supply. – PDuarte Apr 16 '18 at 15:22

To broadly answer your question regarding the bias of D2. It will be forward biased if the calculated voltage at Vo exceed the rated forward voltage of D2 (let's say 0.7 V for the sake of argument) and the 10v power supply.

D1 will be forward biased if the input voltage is above the rated forward voltage of D1. For example: if Vi i 3.7 V, you will have 3 V available after D1. You know that 3V will not be enough to overcome the 10.7V of D2. Therefore, since we don't know what load is connected to Vo, we can assume that the ''in-line'' 10k resistor is floating and that you will have a voltage divider between the two other 10k. End result is that Vo will be 1.5 V.

When D2 will become forward biased, the best analytical approach will be to either use a Thevenin equivalent on D1/10V or use Millman theorem to solve the circuit. Before doing Thevenin, you can get rid of D1 in your circuit analysis since you know that it will be forward biased and that it will reduce the input voltage by 0.7 V. For the actual circuit output, it will be the combo of the forward voltage of the diode and the 10 V (10.7 V). Thevenin and Millman will only be required if you want to compute the node in between all the resistors.