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i am using 4MHz clock for pic18f452. therefore, 250ns is 1 instruction cycle. is there any way to get a delay of 375ns? using timers, i cant define count in fractions. using inbuit delay function delay(1)=250ns delay(2)=500ns . if i use delay(1.5) it will be still 250ns as i can only use an integer as a passing parameter.

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  • \$\begingroup\$ Please explain where do you need the delay. If you have a sequence like write port high, delay, write port low the actual pulse width is at least delay+250ns. I see that you don't use asm so in fact it might take longer depending on the C implementation of the write port sequence. \$\endgroup\$ – Dorian Apr 17 '18 at 7:16
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I think you are not calculating instruction time correctly. A 4 MHz clock is divided by 4 phases (fetch, decode, execute, store), so you have a 1 us instruction time, the smallest delay at 4 MHz.

However, I looked at the spec sheet for the PIC18F452 and it states that it will run off an external oscillator from DC to 40 MHz. 40MHZ means a 100 ns instruction time.

4 of those cycles gives you exactly 400 ns. Or you can run 3 cycles for 300 ns and use a RC network to stretch it out another 75 ns.

If toggling a I/O pin then the best you can do in a burst is 10 MHz/2.

Note that you could buy a good 32 MHZ oscillator which would give you exactly 375 ns instruction cycles, as suggested by @winny.

This is quoted from the PIC18F4xx datasheet:

• Up to 10 MIPs operation:

  • DC - 40 MHz osc./clock input

  • 4 MHz - 10 MHz osc./clock input with PLL active

• 16-bit wide instructions, 8-bit wide data path

• Priority levels for interrupts

• 8 x 8 Single Cycle Hardware Multiplier

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    \$\begingroup\$ Or just use a 32 MHz oscillator to get exactly 375 ns with 3 instruction cycles. \$\endgroup\$ – pipe Apr 17 '18 at 7:29
  • \$\begingroup\$ nS = nanosiemens. ns = nanoseconds. \$\endgroup\$ – winny Apr 17 '18 at 9:57
  • \$\begingroup\$ hi. thankyou for your information..but this pic can fetch the second instruction while cpu is still decoding the first instruction. so the instruction cycle will be same as that of clock cycle. i have got 250ns for any instruction to execute in my program. i need to get delay in my program which shouldn't be in multiples of my instruction cycle.. i.e., 250ns \$\endgroup\$ – Yamunashree Apr 18 '18 at 7:10
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Not familiar with 18F parts, but...

Analog comparators can be used to add delay to pins, and dac could make this tunable. This can't change instruction timing however. CLC modules might be usable likewise

TMR1 can be externally clocked without synchronisation, so you might be able to clock it off the crystal. This can't change instruction timing however.

You have a 4x clock PLL, so you could bump up the internal clock for a bit. This will change the instruction timing.

BTW 4MHz xtal = 1000ns cycle

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  • \$\begingroup\$ yeah.. sounds feasible i'll try.. thankyou \$\endgroup\$ – Yamunashree Apr 18 '18 at 7:30

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