Not just with only a 2:1 multiplexer, you'll need to negate a few inputs to get some of the functions like xor.
The can do and and or without gates
Source: VLSI blog
Here is one for a xor function, but it requires a not gate.
Source: VLSI Questions
Remember that a mux is a collection of gates, a useful one. It's important for you to know how to scale these down becasue you can simplify logic on FPGA's and ASICS and eliminate gates by coding correctly and understanding what the end design goal is. On an ASIC, generally a fewer number of gates is better. On an FPGA using fewer resources is better and usually an FPGA consists of a simple logic chain (like a mux combined with some other logic) and a memory element to form a cell or logic block.
Shown below is a truth table for a 2:1 mux, which can be changed to form many different functions: