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I was tasked with creating a function "transitions" that takes as input a value of type std_logic of arbitrary length. The returned value should be an integer that records the number of transitions (0 → 1, or 1 → 0) as you scan the binary bit pattern from left to right (or right to left). For example, the value 0110010011 would return 5; the value 001 would return 1.

Below is a piece of VHDL code that you can use to test your function. Add your function to the code and simulate to check that your code is giving the correct result. Show your code and the simulation results. In your simulation, display the first 100 ns, with t2, t4, t6 and t8 all shown as either signed or unsigned decimal and data displayed as binary.

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity test_transitions is
end test_transitions;

architecture Behavioral of test_transitions is
  signal data: std_logic_vector (7 downto 0):="01111100";
  signal t8, t6, t4, t2: integer;
begin
  tt: process
  begin
    wait for 10 ns;
    data <= data+1;
  end process tt;

  t8 <= transitions(data);
  t6 <= transitions(data(5 downto 0));
  t4 <= transitions(data(3 downto 0));
  t2 <= transitions(data(1 downto 0));

end Behavioral;

Here's what I coded but keep receiving multiple syntax errors when I perform the Behavioral Check Syntax Test in the Xilinx ISE Design Suite. Any help would be greatly appreciated.

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity TransitionFunction is
end TransitionFunction;

architecture Behavioral of TransitionFunction is

  function transition(signal data: in std_logic) return integer is 
    variable count: integer;
  begin
    count:= 0;
    for i in data'range loop
      if data(i) /= data(i+1) then
        count := count + 1;
      end if;
    end loop;
    return count;
  end transition;

  signal data: std_logic_vector(7 downto 0):="01111100";
  signal t8, t6, t4, t2: integer;
begin

  tt:   process
  begin
    wait for 10 ns;
    data <= data+1;
  end process tt;

  t8 <= transitions(data);
  t6 <= transitions(data(5 downto 0)));
  t4 <= transitions(data(3 downto 0)));
  t2 <= transitions(data(1 downto 0))); 

end Behavioral;

Error messages: enter image description here

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closed as unclear what you're asking by laptop2d, Lior Bilia, RoyC, Finbarr, Harry Svensson Apr 23 '18 at 19:01

Please clarify your specific problem or add additional details to highlight exactly what you need. As it's currently written, it’s hard to tell exactly what you're asking. See the How to Ask page for help clarifying this question. If this question can be reworded to fit the rules in the help center, please edit the question.

  • \$\begingroup\$ Well, what are the error messages telling you? Or were we supposed to guess? \$\endgroup\$ – Dave Tweed Apr 17 '18 at 20:01
  • \$\begingroup\$ For one thing, check your function input parameters. \$\endgroup\$ – Blair Fonville Apr 17 '18 at 20:27
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For one thing, check your function input parameters.

function transition(signal data: in std_logic) return integer is

should be

function transition(signal data: in std_logic_vector) return integer is

Then in the main body, you're trying to use a function transitions, which doesn't exist. It should be transition. Or change the name of your function.

Finally, you have too many closing parentheses in

t6 <= transitions(data(5 downto 0)));, etc...

Note: fixing these will clear your syntax errors. This doesn't necessarily mean that your code will do what you expect it to.


edit - per comments:

I believe because of the (i+1)

Correct. Your vector index is based at 0 - i.e. data(0) is the 1st bit, and data(data'length-1) is your last bit.

The range attribute of a std_logic_vector gives you (n downto 0). For instance:

SIGNAL x : STD_LOGIC_VECTOR (7 downto 0);
-- x'RANGE = (7 downto 0)

So, when the loop gets to the end, and i=7, your data(i+1) will always try to access an index which is out of bounds of the vector.

I tried limiting the index to stop at 6 with the line "for i in 0 to 6 loop"

This isn't going to work for any of these cases:

  t6 <= transition(data(5 downto 0)));
  t4 <= transition(data(3 downto 0)));
  t2 <= transition(data(1 downto 0)));

What you want is to ensure that your loop always iterates to data'length-2, so that when i=data'length-2, i+1 = data'length-1, which is the last possible index of your vector.

So,

for i in 0 to data'length-2 loop
  if data(i) /= data(i+1) then
    count := count + 1;
  end if;
end loop;

Note that this will also work for 1-bit vectors:

t1 <= transition(data(0 downto 0));

In this case, the for loop will simply be skipped, and count will return with its initialized value count := 0, which makes sense as there will be no countable transitions.

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  • \$\begingroup\$ Yeah, the code still won't run, that loop in the function is going to go out of range. \$\endgroup\$ – DonFusili Apr 18 '18 at 12:52
  • \$\begingroup\$ @DonFusili Correct, hence the last sentence. This just answers his question about the syntax errors. I intentionally leave working out the homework to the OP \$\endgroup\$ – Blair Fonville Apr 18 '18 at 12:55
  • \$\begingroup\$ How would you keep it from going out of range? \$\endgroup\$ – Sofia Zapata Apr 18 '18 at 13:37
  • \$\begingroup\$ @SofiaZapata I can respond soon; in the meantime, do you understand why it goes out of range? \$\endgroup\$ – Blair Fonville Apr 18 '18 at 14:11
  • \$\begingroup\$ I believe because of the (i+1), I tried limiting the index to stop at 6 with the line "for i in 0 to 6 loop"... and I get no syntax errors but my simulation is not returning any values. \$\endgroup\$ – Sofia Zapata Apr 18 '18 at 14:17

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