We are designing a SMPS (ultra low noise) based on TI schematics http://www.ti.com/lit/df/tidrgc2/tidrgc2.pdf (5V, 15W quasi resonant)

In order to reduce EMI (we have some ringing across Mosfet when its turned off) we added some ferrite beads before the R4 and R5. (330 mA, 600R/100MHz, 480mOhm DCR)

Of course we modified the R4 and R5 (we subtracted the R of the ferrite bead). We also added a FB on gate of mosfet (same specs).

However while ringing decreased substantially , every time we push to 15W (load) our unit goes bad. It works fine at 5 W.

I read that inductance on the mosfet source is a bad thinng in SMPS. Can it be the root cause (inductance of the FB)? Am I missing something?

We removed the ferrite beads as instructed. Will try a different approach.

  • \$\begingroup\$ You normally keep smps power paths (especially the switching node) short to avoid parasitic inductances. How does a inductor behave when you suddenly Interrupt the current path? RC snubber is the thing your looking for. \$\endgroup\$ – Jogitech Apr 19 '18 at 9:04
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    \$\begingroup\$ That's what you pay with for introducing L. Please show oscillograms. Listen to Jogitech! RC is underestimated for some snubbing applications. \$\endgroup\$ – winny Apr 19 '18 at 9:23
  • \$\begingroup\$ Because you mentioned ultra low noise...slower fet transitions (adding more gate resistance) have a positive effect on ringing emi (on the expense of more switching losses) \$\endgroup\$ – Jogitech Apr 19 '18 at 9:32
  • \$\begingroup\$ I did add a RC snubber but we changed the Mosfet to st.com/content/ccc/resource/technical/document/datasheet/52/57/…. RC snubber is 47pf/50R but that does not reduce the ringing significantly . When increased to 330pf/50R Mosfet goes bad \$\endgroup\$ – Johan B. Apr 19 '18 at 9:36
  • \$\begingroup\$ Yeap I have a 50R on gate + FB \$\endgroup\$ – Johan B. Apr 19 '18 at 9:43

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