I am using MCP2210 in my project to communicate with a processor (TMS320F28377D from TI).

For tests, I use SPI Terminal programm from microchip. However there are some issues.

There are some settings for delays, CS-to-Data, Data-to-Data, LastData-to-CS delay. I set everything to zero, although there are always delays if I use high speed SPI for example 1MBit/s.

I attach screenshoots and osci picture.

This is SPI Terminal screenshoot. I send zeros just for testing. I use 32 Byte transfer and as you can see, all delays are set to zero.

This is MCP2210 Utility programm. I read back the configurations, they are set correctly.

If I send data, there are huge delays between Cs-to-Data, Data-to-Data and LastData-to-CS (not shown in picture).

Green is SPI clock

Yellow is Chip Select

Light blue is MOSI (MCP2210 is Master)

Purple is MISO (TMS processor is Slave)

Why is it so?


  • \$\begingroup\$ You really should read the datasheet how the SPI works. I have no idea what all those settings do. e.g. are they HW or SW settings. It looks to me the CS is done in SW which would explain the delay. \$\endgroup\$
    – Oldfart
    Apr 19, 2018 at 14:07
  • \$\begingroup\$ Looks like about 32us delay from CS to SPI data, right? What times do you get if you set 'CS-to-Data Delay' to 10us, 50us, 100us? \$\endgroup\$ Apr 19, 2018 at 14:11

1 Answer 1


The delays happen because the MCP22xx family of devices is allegedly based on general-purpose PIC16F145x MCU. This MCU has only a 8-bit hardware to convert a byte into serial code, Master Synchronous Serial Port (MSSP) module. The converter is only 8 bit, and there is no DMA or else. So every transfer must be firmware-initiated, byte by byte, that's why the delays. Plus USB overhead. As result, there are gaps about 30 us between bytes on the bus. This device looks like a kludge. There are numerous complaints about sluggish performance of these ICs on Internet.


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