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I am new to electronics and I'm trying to understand how the 555 timer works based on the diagram below. I am following the tutorial/explanation at https://www.electronics-tutorials.ws/waveforms/555_timer.html

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In the tutorial, for the description of pin 7 (discharge), it says:

The discharge pin is connected directly to the Collector of an internal NPN transistor which is used to “discharge” the timing capacitor to ground when the output at pin 3 switches “LOW”

However, I don't understand how the base of the transistor could be allowing the capacitor a path to ground (which would require the base to be "high", if I understand correctly) if the output at pin 3 is "low" at the same time, since they are both connected to /Q. Shouldn't they both be "high" or both be "low"?

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  • \$\begingroup\$ What if the "Output Driver" does an inversion of the /Q? (And shouldn't that be Q as it is not the inverted Flip-flop output?) \$\endgroup\$ – Arsenal Apr 19 '18 at 14:34
  • \$\begingroup\$ tinyurl.com/y7rpp9lh this shows it better although the true schematic at pin 3 is complementary Darlington Emitter followers. \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Apr 19 '18 at 14:55
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"OUTPUT DRIVER" in your diagram doesn't show its logical function (which is a logical inversion). Some other internal diagrams of a 555 shown below.
These diagrams are simplifications. There actually is a transistor connected to pin 7, but its base drive is not shown properly in these diagrams. This transistor is configured as a switch, which is either non-conducting, or it is "ON", pulling a lot of current from pin 7 to ground (pin 1).

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I have previously done an LT-Spice simulation of the equivalent circuit of the 555 chip using 2N2904 and 2N3906 transistor models. (Yes you could even physically build a discrete version of the 555 if you detest the IC in its 8-pin package).

Here is a waveform from the simulation showing the OUT, DIS and BASE of the DISCHARGE NPN transistor. Note that the BASE is high during the time the OUT pin is low.

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Here is a picture of the simulation schematic. This first part is the connection setup for the 555 model.

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Next I show the schematic portion that is the actual 555 model.

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If you look closely at the output section (which I show a snip of below) you will note that both the Q14 DISCHARGE transistor and the Q24 transistor that pulls the OUT low derive their base drive from the same source.

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  • \$\begingroup\$ +1 for the 555 model. \$\endgroup\$ – StainlessSteelRat Apr 19 '18 at 18:43

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