I am new to electronics and I'm trying to understand how the 555 timer works based on the diagram below. I am following the tutorial/explanation at https://www.electronics-tutorials.ws/waveforms/555_timer.html
In the tutorial, for the description of pin 7 (discharge), it says:
The discharge pin is connected directly to the Collector of an internal NPN transistor which is used to “discharge” the timing capacitor to ground when the output at pin 3 switches “LOW”
However, I don't understand how the base of the transistor could be allowing the capacitor a path to ground (which would require the base to be "high", if I understand correctly) if the output at pin 3 is "low" at the same time, since they are both connected to /Q. Shouldn't they both be "high" or both be "low"?