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Reading about the differential amplifier in The Art of Electronics, we are introduced to this circuit.

It is claimed that the common mode input voltage is limited at the upper end by \$Q_2\$'s collector quiescent voltage of \$2.5V\$. Understanding this limitation was because of \$Q_2\$'s saturation, I pondered the effects of saturation , namely that the collector voltage of one of the transistors could not go much lower than the input applied to it.

I transcribed the circuit in CircuitLab and ran a DC sweep.

schematic

simulate this circuit – Schematic created using CircuitLab

With the following parameters :

\$V_{diff}\$ : -1 to 1 V

\$V_{com}\$ : 0 to 2 V

I got (as expected) weird variations or offsets when one of the transistors was pushed in saturation.nonlinearity, please click to zoom if you feel the need

Given that the nonlinearities result in outright wrong output slope, and are therefore problematic, how does one prevent this behavior ?

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  • \$\begingroup\$ Your two collector resistors are probably too large (you have a 5V power supply rail.) You are driving 10X past the usable range of a diff-amp pair, which is more like \$\pm 100\:\text{mV}\$ (and that's pushing it.) And you are using an ACTUAL current sink, besides, which includes some aphysical behaviors you don't normally see in a real circuit. I'd start by either working out a sweep range that the circuit can actually achieve (with an aphysical current sink) or else replace the current sink with something physical; plus not start vcom at 0; plus reduce the collector resistor values. \$\endgroup\$
    – jonk
    Apr 24 '18 at 1:04
  • \$\begingroup\$ The right side "oddities" will then still exist because as Q2 saturates out (and it will, with that HUGE difference of 1V), it's emitter is hauled up by brute force and the collector cannot sink below it. So it just follows it up. \$\endgroup\$
    – jonk
    Apr 24 '18 at 1:12
  • \$\begingroup\$ How would one set the bias given the quiescent current if we need to adjust the collectors' resistors ? At what voltage should I start Vcom at ? I sweeped across the usable range you mentioned. there is still some definitive "soft clipping", but it seems much more workable. It seems the range is about +-60 +-40 mV. The book did not really talk about it, but with such great gains I guess it was implied. \$\endgroup\$ Apr 24 '18 at 1:19
  • \$\begingroup\$ See answer below. \$\endgroup\$
    – jonk
    Apr 24 '18 at 1:40
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    \$\begingroup\$ Read about the LM13600/LM13700 VCA - datasheet, app notes, design history. It used a novel technique to increase the linear range of a diff amp stage. Can't remember the details but you might want to see fi the same technique can be applied to your design. \$\endgroup\$ Apr 24 '18 at 10:26
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A diff-amp pair with collector resistors like this is usually considered good for maybe, under unusual motivations, a base voltage difference of perhaps \$\pm 100\:\text{mV}\$. Stretching the bases any more than that will often cause one of the BJTs to saturate, with more and more of the current normally in the collector shifting over to the base. (Though that does depend on the collector resistor values, too.)

If one of the BJTs does saturate, and while the base voltage on the now-saturating BJT continues even further upward, it merely hauls the collector voltage up along with the emitter. What else can it do? The emitter and collector are essentially smashed together now. So they both just track the base voltage upward, except by about a diode drop or so.


Let's look at a more realistic approach:

schematic

simulate this circuit – Schematic created using CircuitLab

Now you have a current sink that will act like one and this is designed for around the same value as you specified, \$200\:\mu\text{A}\$. Maybe a little less. But close.

Also, you now need headroom for it to operate. It will require at least two diode drops. At least \$1.5\:\text{V}\$. Add in the required diode drops for either of the diff-pair BJTs and you probably would be wise to keep \$V_1\ge 2.5\:\text{V}\$.

Also, since there is a 10-fold change in current with just a \$60\:\text{mV}\$ base difference, there really isn't any point in going much beyond that. So you should limit \$-100\:\text{mV}\le V_2\le +100\:\text{mV}\$.

To keep the BJTs from saturating, their collectors should always be higher than your maximum swept value for \$V_1\$, plus your maximum swept value for \$V_2\$. Let's say you will sweep \$2.5\:\text{V} \le V_1\le 3.5\:\text{V}\$ and \$-100\:\text{mV}\le V_2\le +100\:\text{mV}\$. Then this means the collectors should never go below \$3.6\:\text{V}\$. With about \$200\:\mu\text{A}\$ possible, this means \$\frac{5\:\text{V}-3.6\:\text{V}}{200\:\mu\text{A}}=7\:\text{k}\Omega\$. I used nearby values, above.

Now try your sweeps (N002 is \$Q_1\$'s collector, N003 is \$Q_2\$'s collector):

enter image description here


There really isn't a way to design a diff-amp pair so that the collector voltages can sweep completely through the entire range from ground to \$V_\text{CC}\$. It just cannot happen. Your original design assumed a balance of \$100\:\mu\text{A}\$ in each collector (half to the left, half to the right.) Each collector would be \$5\:\text{V}-25\:\text{k}\Omega\cdot 100\:\mu\text{A}=2.5\:\text{V}\$.

But that's not a sane setting. You have to reserve headroom for the \$V_\text{BE}\$ of your diff-pair and you also need to reserve headroom for whatever is acting as the current sink (current mirror BJT, or as in the above circuit.) There's no avoiding that reservation.

And if this is a discrete design, then there are even more elements of headroom required (degeneration for BJT variation and thermal changes, for example, at the expense of still more gain of course.)

So you must expect that the quiescent voltage at the collectors will in fact not be halfway between the rails. But somewhere else. That's life.

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  • \$\begingroup\$ I see... This looks in contradiction with the book, as it is said the collector resistors are chosen to create the quiescent output. But you're certainly right. I will wait about one day to see if another answer comes up before accepting (if it's the best) yours. \$\endgroup\$ Apr 24 '18 at 1:53
  • \$\begingroup\$ @Sachiko.Shinozaki The collector resistors are chosen for lots of reasons. In this case, I chose them to avoid saturation because that's what you were experiencing. In more general terms, there are a number of factors leading to choosing a collector resistor value. But your situation was cramped (small V rail.) You have to allow "headroom" for ANY circuit. You could get closer to your collector values by using a current mirror as the sink, since then 1.5V would lower to about 0.7V leaving more room above. Or get a (-) rail voltage. Etc. \$\endgroup\$
    – jonk
    Apr 24 '18 at 2:01
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Without a resistance between the emitters of the diff pair, the linear operation range is restricted to a differential voltage of a few 10s of mV.

If you want to tolerate up to 1v differential input, then you must use a suitable inter-emitter resistor so that the inter-emitter current is less than the total tail current, and so that both transistors stay conducting.

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