# Why Does DC Load Draw Twice As Much AC Current Through Transformer?

I have designed the following circuit, comprised of 4 loads, 1 of 4.2ohms and 3 of 21ohms, drawing a total of 2.4Arms (1.5A, 300mA, 300mA and 300mA respectively) of AC current through the secondary of a transformer which outputs 6.3Vrms connected to the mains voltage (120Vrms) through the primary.

However, I have found myself in the need of feeding the last load with DC current instead of AC, so the solution is to add a rectifier and then connect the load to it to draw DC, naturally, adding a ripple filter capacitor and dropping resistor to adjust for 6.3VDC, taking into account the 1.1V drop of the bridge (datasheet).

I have a book on the subject and the author has also a website, and in both he mentions that whatever DC current the last load is drawing will count for twice as much AC current (so a load drawing 300mA DC counts for 600mA of AC) for the transformer, but he doesn’t explain why (I guess it’s obvious?).

Does this mean that the last load along with the rectifier can be substituted for a single load that draws AC current but with half the resistance? Why is this?

My thinking process is that all the rectifier is doing is re-directing the current so that it always flows in the same direction through the load, both in the positive and negative swings of the AC current before it, in my opinion, the transformer should not even know that there is a rectifier, from the transformer points of view there is always a fixed value load drawing current, in any polarity.

I ran a circuit simulation in EveryCircuit without the capacitor and drop resistor and the waveforms match my conclusions, orange is the AC current drawn by a 21ohm load, blue is the DC current drawn by the last 21ohm load after the bridge and green is the AC equivalent of the current drawn by the last load through the bridge.

The DC current after the bridge is the same as the AC current before it, except for the polarity, I don’t understand the difference in current compared to the loads drawing AC though, 420mA peak vs 308mA peak, maybe the crossover distortion due to the bridge?

But still, the current drawn per cycle is the same, it’s just that after rectification the current flows only in one direction, so I don’t see where this extra double current would be going ¿?

If I add the capacitor the waveforms match what I have read, it turns the current drawn into brief spikes instead of more somewhat constant lobes, is this where the extra current is going? But even then, my analogy is that the shape of the curve is like a rope with a fixed length, you can re shape the rope from a sinewave to a square wave or into thin spikes but the length of the rope can’t change because that would mean the area below the curve would change meaning more or less current is being drawn, right?

And if P=V*I and the voltages are fixed, an increase in current would mean an increase of energy per second being consumed but where does this energy go? There is power lost in the bridge and the drop resistor but I don’t see how this would mean a double increase in current drawn.

The reason I’m focusing on current and not voltage is because I need to find a suitable fuse to add between the last AC load and the rectifier, as well as to find a suitable fuse for the primary, I’m aware of current inrush and I will add a thermistor to the circuit later on, but right now, I need to know the steady state current values. So, for the circuit with only AC loads that would mean 2.4A but how much for the circuit with the DC rectified load?

• Sounds more like a rough "rule of thumb" than a strict mathematical relationship. Probably intended for conservatively estimating the size of the transformer required. – Dave Tweed Apr 26 '18 at 22:52
• note: your first circuit does not show 4 loads as you stated .... it shows one load, comprised of 4 resistors .... there is only one load, because it is the total resistance as seen by the transformer secondary – jsotola Apr 27 '18 at 1:26

It's about the harmonics. When you are using the resistor (load) directly on the secondary of the transformer, you are using a nice sinusoidal current, but when you rectify the voltage, the nonlinearity of the diodes, combined with the capacitive load, add harmonics to the current and make its value larger. The "twice as much current" is not a rule, it can get very ugly, but it's usually less, depending on the elements.

Here's a quick test in LTspice:

V1 and R1 make your secondary and the 21$\Omega$ load. The rest is a rectifier and the load, plus a 1mF cap (random values). The currents are the red and green traces, while the powers are the black and blue, reading:

It's not quite twice as much but, the diodes are ideal and the voltage isn't properly rectified (could have used a bigger cap). Still, the ration goes closer to 1.3. In short, you pay for convenience, but there are solutions for mitigation: power factor correction circuits, active power filters, active rectifiers, filter traps, etc.

Given your comments below, here's the remade version with a quasi-real setup, 2x4700$\mu$F with some ESR, added series 4.7$\Omega$, some 1N4007 diode model:

And here's an enlarged portion of the waveforms and their readings:

The current is smoothened out due to the ESR, the added load (4.7+21), the on resistance of the diodes, and not lastly, the internal resistance of the secondary (which will, no doubt, be much larger than the measily 50m$\Omega$ in the schematic). The powers are also closer, but the peaks of the current are still larger than the nice sinusoidal waveform, so you should account for those when choosing diodes (here the 4007 are used because I had a readily available .model).

I'll try to make it clear that the 74% procent Tony Stewart talks about is not a number to trust, or even quote. Here's the rectified version, with 21$\Omega$ load, with a .step'ed cap from 470$\mu$F to 10mF:

The current's shape is getting thinner with the higher harmonic content given by the increasing capacitor's value -- the bridge is the same. The value of the RMS current is also increasing (see log), the FFT shows increasing higher harmonics, thus the value of the RMS current is increasing due to harmonic content. Here's a zoomed version of the FFT:

The trace's label is black, so the first .step'ed trace is black, going to blue, red, etc. The first step, as seen in the previous picture, is the 470$\mu$F, the last 10mF, thus the higher harmonics grow with the value of the capacitor, also increasing the value of the RMS current.

If only the capacitor was there, without the bridge, this would have been the result:

Note that the bridge is still there, but it's not connected (intended). The waveforms are that of the voltage and the current through the source. The FFT shows no harmonics -- ignore the noise, plotwinsize is not set, neither is a timestep imposed, yet clearly shows the fundamental, only.

If a bridge is added, without the capacitor, this is the result:

Notice the dead-zone due to the voltage drop. The power may be close to a pure resistive only, but the harmonics appeared due to the nonlinearity of the load.

Whe both the bridge and the capacitor are added with the load, you get what the first pictures show. The conclusion is clear and mentioned in the first lines of the answer: the nonlinearity of the diodes, combined with the capacitive load, add harmonics to the current and make its value larger (of the power).

Is the power higher by 74%, give or take? The RMS value of the source is 6.3V. The values of the RMS current, as the capacitor is .step'ed in increasing value, go from 0.478A to 0.855A. The voltage across the load (forgot to show it) goes from 5.65V to 6.99V. This means that the output power is from 1.52W to 2.33W, while the input power is from 3.01W to 5.39W, meaning the ratio of powers (inverse of efficiency, really) goes from 1.98 (98% more) to 2.31 (131% more), which is much more than 74%.

But all this implies a fairly ideal case. Let's choose a quasi-real setup: an actual trafo and your loads:

The transformer is half-guessed, with some exaggerated values in there (area, length of magnetic path, to accomodate the high number of turns, to avoid saturation), but there is some leakage and series resistance. You can clearly see that the current is nowhere near what is expected. But that may be because of the included AC loads, because the AC current drowns the charging capacitor. Still, the inverse of efficiency is 1.252 (slightly less than 80%).

Let's shift them all after the bridge, maybe this time, for sure, we'll see some effects?

More like it... but the readings say 1.278, very close to 1.252, despite the apparent distorted current! And yet, this is closer to what you'll be really seeing if such a load were to be. In your case, it's more likely to be the previous one.

The conclusion is that the extra power comes from the distortion caused by harmonics, which are not only inherent to nonlinear elements, but cannot be separated from the meaning of a nonlinear load, no matter its type. You simply cannot talk about a nonlinear load and harmonics separately, an entire domain of electronics is based on this association. No matter the amount, higher harmonics cause a higher power consumption. If there were no harmonics, the ratio of powers would be done at fundamental level, only, and a phase delay would have been the only thing that happened -- the waveform would still be a sine, non-distorted, and $\cos\phi$ would be the only factor separating the powers.

• Harmonics is the result, not the cause of DC power differences. It is the massive Cap charge current that stores energy. This is the cause. so (-1) – Tony Stewart Sunnyskyguy EE75 Apr 26 '18 at 20:37
• "... the nonlinearity of the diodes, combined with the capacitive load, add harmonics to the current and make its value larger... " – Raz Apr 26 '18 at 23:33
• @TonyStewartEEsince1975 You shouldn't extract from the context, instead, try to read all, like Raz did. If the diodes were resistors (linear), there would not hae been any peaks. – a concerned citizen Apr 27 '18 at 6:02
• @TonyStewartEEsince1975 Also, harmonics are the cause for the difference in powers, if not, the formula would not account them and the power will result the same -- all the sum of harmonics under the sqrt() will be zero, so harmonics are the cause --, and the cap is (one of) the cause(s) for drawing them (together with the bridge). – a concerned citizen Apr 27 '18 at 7:06
• Both time or freq domain analysis methods are valid. My point is it the Cap and diode switch perform the burst energy transfer to store 74 or Pi/4 power boost – Tony Stewart Sunnyskyguy EE75 Apr 27 '18 at 14:07

## Assertion

The DC does NOT draw twice as much current but it can deliver twice as much power.

## Proof

The peak voltage is $$V_p= \sqrt{2}* V{rms}$$

Thus neglicting 1.4V bridge diode drop for Silicon, if the AC rectifer drives a very large capacitance such as that in any battery ( ~ 10kF ballpark)
$P_{DC}=\dfrac{V_p^2}{R}=\dfrac{2V_{rms}}{R}=2*P_{AC}$

## Rule of Thumb

• for a line frequency of f, RC=T and 1/f=$\tau$ , choose T>> $\tau$
• e.g.
for ~5% Vpp /Vdc ripple choose RC=10*f
for ~10% ripple choose RC=5*f , note that the mean voltage also drops with more ripple.
• 1.4V Si Diode drop (x2) must be subtracted from the Vac
• the diodes are chosen such that the ESR of the cap,coil,etc or battery V/ESR=Ipk does not exceed max peak current. This pk current is inverse in duty cycle to ripple voltage.
• hhmmm right, so it's those spikes because of the cap, so they can reach high values but for brief periods of time, I will be using slow-blow fuses, so all I need to know is if there is a formula to calculate the effective current given the capacitor value, I will be using two 4700uF in parallel – Raz Apr 26 '18 at 21:09
• You ignored all the suggestions in my answer with that comment. A slowblow does not improve reliability in the caps and the load R and is needed if Ic=0.3A=CdV/dt then in 10ms dV=0.3*10ms/4.7mF= 0.64V droop – Tony Stewart Sunnyskyguy EE75 Apr 26 '18 at 21:12
• this is part of a vacuum tube filament supply, these things are VERY basic, I have no real need for involved active stuff, as a matter of fact an ntc termistor is already stepping into advanced territory with these circuits. – Raz Apr 26 '18 at 23:32
• Not really. Originally electromagnet speakers used to be in series in which the inductance reduced the surge current of the hot filaments. You must not ignore Capacitor stress factors of ripple current. – Tony Stewart Sunnyskyguy EE75 Apr 26 '18 at 23:44
• "comparing oranges with apples" ...but Power has a relationship with current...you are thinking the answer to this simple question in a complicated way. This is a straight forward answer from full wave rectifier + shunt capacitor theory. – Mitu Raj Apr 29 '18 at 6:44

Why Does DC Load Draw Twice As Much AC Current Through Transformer?

It doesn't, for average current. It does, or can do, for RMS current.

One of the specifications of the transformer is current that it can deliver without overheating.

The heating effect of the current on the transformer is dependent on its RMS value. The transformer is heated by current flowing through its residual winding resistance.

A rectifier/capacitor DC load creates a much higher RMS load current on the transformer than does a nice resistive AC load, because it draws current in huge spikes, which cause excess I2R heating.

For the same heating in the transformer, you can only draw about half the current from a rectifier/capacitor load than you can a plain resistive load.

The peak current has to go up because the diodes only conduct for a small fraction of the cycle. To achieve the correct average current, the peak current has to be higher.

The diodes only conduct when the AC voltage is higher than the (DC) voltage on the capacitor. If there was no load, the capacitor would charge to the peak AC voltage and the diodes would never conduct again. The DC load causes the capacitor voltage to droop during each half cycle, and then the diodes conduct briefly to recharge when the AC voltage is finally above the DC voltage.

The bigger the capacitor, the smaller the droop, the shorter the interval. For a constant average DC current, that means the AC peak current has to increase.