# How to 'Shift in Parallel' in a shift register?

I am trying to design a basic calculator that can add, sub, mul and div with Logisim. To store the operands I am going to use shift registers. I have recently learned about them and I understand what is serial input and parallel load. I also know how to shift the bits. I have copied this universal shift register from my text book. (Digital Design by Morris Mano) The calculator will work on 4 digits only. That's why I have combined 4 Universal Shift Registers in the following way Here, every time I shift the value (Left or Right) the register shifts only 1 bit. What I need is to be able to shift 4 bits at a time. Because I am storing my digits in BCD, so I need to be able to move all the 4 bits to right or left together on a single clock pulse.

I have searched this on google and all I could find were: Serial In Serial out Shift Register,
Serial In Parallel out Shift Register,
Parallel In Serial out Shift Register,
Parallel In Parallel out Shift Register.

But all these registers can shift only one bit per clock pulse. So, to be able to store my BCD representations, how can I shift the bits in parallel (4 bits at a time) ?

Or should I somehow control the clock to make it pulse only 4 times? (If yes, please explain me how)

Please mention if there is a better way to store my operands.

• Let's back up a second. Why do you think you need a shift register here?
– user39382
May 1, 2018 at 22:38
• It's the only memory element I know about for now. And I'm using the Shift register so that I can easily use the Backspace functionality. When any digit is clicked >> shift right 4 bits. When backspace is clicked << shift left 4 bits. May 1, 2018 at 22:45
• BTW, shift left 4 is rotate right 12 May 2, 2018 at 0:01
• You can use a mux to select between 'shift 1' and 'shift 4'
– HKOB
May 2, 2018 at 6:35
• To shift 4 bits you should connect 4 shift registers in parallel instead of in series. May 2, 2018 at 21:59

I don't what the rest of your design looks like but the operands have to come from somewhere. I assume that is the 4-bit bus in the lower left corner.

To shift 4 bits backwards and forward you have to put four shift registers in parallel. You have put them in series.

Putting two shift register in series doubles the depth.
Putting two shift register in parallel doubles the width.

• Thanks, can you please explain what you mean by "put four shift in parallel". How do I do it? Any resources where I can look up? May 2, 2018 at 21:33
• You need to take you four shift registers and feed each of your four input bits into the input shift right port of each shift register. Then on each clock all four bits move in parallel. (It also means you can drop the in0..in3 input ports. You don't need them) May 2, 2018 at 21:49

You just shift 4 times.

Early calculators used a 4 bit CPU, as that is all you need for BCD maths.

But inside that 4 bit cpu, they used a 1 bit arithmetic-logic unit to do the actual adds. They shifted the 4 bits serially through the 1 bit ALU, doing 1 bit add-with-carry. (later 8 bit cpus did the same)

Once you get your head around this idea, you realise that doing multiple precision maths is no harder on a 1 bit ALU, that it is on a 32bit CPU - just slower, but using way fewer transistors.

It is still multiple precision maths.

And if you are making a calculator you will still have to do multiple precision maths even if you use a 32 bit ARM.

It seems to me, that you only need two, 16 bit one way shift registers (operands X,Y), with one 4 bit parallel load input nibble.

You can copy X to Y by 16 single bit shifts. You can shift left by 15 rotate rights You can do maths with a 1 bit ALU with carry. You will need a clever decimal adjust every nibble. You need a loadable 4 bit counter for shift control as you will have 4 bit, 1 bit,15bit and 16 bit shifts

So I really don't think you need bi-directional or parallel load shift resisters at all. Most of the logic operations and muxing will all happen 1 bit wide at the end of the SR.

The circuit shown in the question is a single bit shift because A3 feeds into the mux of A2. 3-2 = 1, hence one bit shift.

If instead, A6 feeds into the mux of A2, A7 into A3, A5 into A1, and so on, then it will support a 4 bit shift in a single operation.

If you are designing for a BCD encoding, then having a shift-by-4 operation is a good idea, and will be a significant time savings over repeating a shift-by-1.

• Note that if you were to take the shift-by-4 register connections and arrange the registers in a matrix of 4 rows and N/4 columns, instead of a single row of N columns, you'd see the "parallel connection of 4 shift registers" some of the comments are talking about. Sep 26, 2019 at 4:48