# Power MOSFETs and Gate drivers

I'm trying to finally apply what I learned at university in the course of power electronics. However I find that both that course and most of the books / online references are lacking on some points.

In fact (this may be similar to controlling H-bridges for motor drivers, not sure) there are some possibilities concerning how to realize a step-down (buck) converter:

• Using PMOS as input switch (source at supply voltage) -> gate of the PMOS needs to be HIGH when PMOS is off, while gate of the PMOS needs to be LOW when PMOS is on
• Using NMOS as input switch (drain at supply voltage) -> gate of the NMOS must be commanded via boostrapping (needs an additionnal Diode and Capacitor)

Additionnally it may be a good idea to use a synchronous buck converter (less losses) using an NMOS in parallel to the output diode. I think I got this part and - anyway - it's simpler to command since it's an NMOS with its source tied to the ground.

Back to the original question: while I agree that it may be (theoritically) possible to easily control the PMOS transistor, I think it's pretty difficult, expecially with high input voltages.

Consider that I take power from the wall outlet: 230V_RMS at 10A max (but for my applications I will go for much less, 1A max). I'm gonna get a pseudo-DC voltage by using a bridge rectifier (Gretz's bridge) with a capacitor at its output (standard practice). This last voltage will be the input of my DC/DC buck converter.

Hence the problem: using a microcontroller to generate a PWN signal to control the output voltage (GPIO: 3.3V output, or 5V at best) it's not gonna be possible to activate the NMOS or deactivate the PMOS.

I think I need the NMOS's gate voltage needs to be around 5-10V above the supply voltage. I'll have to do the bootstrapping for that, yet I didn't really understand it. That's what basically GATE drivers are made for AFAIK.

As for the PMOS a simpler solution may be to use an inverted PWM signal (D = PWM at level LOW, normally it's the reverse) and control an optocoupler which has its collector connected to the supply voltage (same as the PMOS source's voltage). Collectors able to sustain that voltage exist, yet there may be a better solution.

There aren't many high voltage MOSFET drivers available on the market (let alone at low cost) and I would really like to know how to do this. I think step-down/buck converters are quite common nowadays, so I find it hard that no such products exist. This leads me to believe that I'm not looking at the right components (yet). Or the only solution would be to realize the driver in discrete components? Any product reccomandation / reference to satisfy these requirements?

EDIT: as I said to Oliven Lathrop here is what I have in mind to control the PMOS. Basically I use a BJT as a current source and then shunt just enough of the voltage (12-15V) to get the PMOS in conduction mode. Otherwise ideally no current flows in the BJT and the PMOS is blocked. PMOS CONTROL http://img513.imageshack.us/img513/1879/pmoscommand.png.

I have not verified the polarity of the PWM signal (should it be reversed or not) but in principle this may "just" work. NPN transistors supporting > 400V_DC are much more common than PNP/PMOS and their price is small. A small current in the BJT is enough. Therefore R2 has to be quite large (in order to get I_BJT_Collector ~ 1mA) and R1 just large enough (but not too much, otherwise the charge takes too long and I dissipate too much energy). May pose a problem for the discharge though, since the accumulated charges can't be evacuated?

EDIT2: I know on the schematic I represented an NMOS transistor, but there was no PMOS symbol in the schematic program I'm currently using. It's actually a PMOS!

EDIT3: On second though I'm not sure this would work since the current is imposed in the NPN, not through R1. It may just work if the current going into the MOS (I_G > 0) adds up with the collector's current of the NPN (I_C > 0). This way the voltage drop actually increases and conduction is assured. Still doubts on the opposide process though.

• Are you absolutely sure that you want a buck converter? If not, a flyback converter may be a better fit for your application (Isolated + low-side switching). – W5VO Aug 4 '12 at 21:27
• @W5VO: unfortunately 50Hz (even 250W) transformers are way too much expensive (>50$/piece at 50+ pieces). I think if the transformer costs > than twice the cost of the rest of the setup something's off. That's a shame because otherwise it would've been a good idea. – user51166 Aug 4 '12 at 21:35 • @user: The flyback method that W5VO mentions drives the primary of a transformer at high frequency. Such transformers are smaller and cheaper for the same power level than the "big iron" ones that run at the original power line frequency. – Olin Lathrop Aug 4 '12 at 21:42 • @OlinLathrop: so the switch is used to generate a presudo-AC high frequency voltage that is then passed through the transformer (if I got this right). Unfortunately I cannot seem to find those on catalogues of the major distributors (e.g. Mouser) under "Power transformers". Maybe they're classified as "Audio transformer" (maybe here: ch.mouser.com/Power/Transformers/Audio-Signal-Transformers/_/…). 3$ for 75W is not that bad of a deal. – user51166 Aug 4 '12 at 21:49
• @user: No transformers intended for flyback power applications would definitely not be called "audio". That's a whole different set of tradeoffs. – Olin Lathrop Aug 4 '12 at 21:56

High side switching is always tricky. There are no easy and simple ways, only various tradeoffs.

PMOS transistors are nice in that they can work within the existing voltage. The gate voltage needs to be pulled below the input voltage by 12-15 V to turn them fully on. The downside is that P channel MOSFETS usually have a little worse characteristics than the equivalent N channel.

N channel may have a better combination of Rdson, voltage tolerance, and cost, but require you to somehow make a voltage higher than the input to drive them. Some high side FET driver chips include a charge pump or other trick for this purpose. Another downside of a N channel high side switch is that the gate must swing a much larger amount, from zero to 12-15 volts above the input. This is because the gate voltage is relative to the source, which is now riding up and down with the voltage being switched. This requires high slew rates to stay out of the partially on region as much as possible, and provides more opportunity for noise pickup elsewhere.

There is no easy solution.

However in your particular case you may not need a high side switch at all. As W5VO mentioned in a comment, a flyback topology only requires a low side switch on the primary. The high side can stay connected to the input voltage.

A center tapped primary with the transformer run in forward mode is another possibility. The center tap goes to the input voltage with a low side switch pulling each end alternately to ground. Again there is no free lunch, which in this case is exhibited by the low side switches now having to withstand twice the input voltage. This is why the center tapped topology is more used for lower input voltages and usually not for worldwide "universal" power, which needs to handle up to 260 V AC or so. That would mean 368 V peaks, and 735 V stress on the low side switches. Transistors with that kind of voltage capability give up other parameters, like gain in bipolars and Rdson in FETs.

There is no free lunch.