How XCHG instruction is executed by 8085 microprocessor ? By default XCHG instruction takes place between DE pair and HL pair. Suppose let us assume contents of DE pair is replaced by the contents of HL pair, then how contents of HL pair are replaced by the contents of DE pair, because it is already replaced by contents of HL pair. How this is possible ?
\$\begingroup\$
\$\endgroup\$
4
asked May 3, 2018 at 9:34
-
1\$\begingroup\$ electronics.stackexchange.com/questions/151631/… \$\endgroup\$– Meenie LeisMay 3, 2018 at 9:49
-
\$\begingroup\$ could it be done with the XOR SWAP algorithm? No intermediate registers are required: en.wikipedia.org/wiki/XOR_swap_algorithm \$\endgroup\$– glen_geekMay 3, 2018 at 12:15
-
1\$\begingroup\$ The 8085 has 3 temporary registers, W, Z and a third (I cannot remember the name). Google 8085 temporary registers. \$\endgroup\$– Steve GMay 3, 2018 at 14:44
-
\$\begingroup\$ not enough clock cycles for XOR swap and the ALU can only write the A register. \$\endgroup\$– Jasen Слава УкраїніMay 4, 2018 at 11:03
Add a comment
|
3 Answers
\$\begingroup\$
\$\endgroup\$
3
In Verilog HDL:
always @(posedge clk)
begin
...
if (is_xchg_opcode)
begin
DE <= HL;
HL <= DE;
end
-
\$\begingroup\$ I think the OP won't understand this though ... \$\endgroup\$– Mitu RajMay 3, 2018 at 10:27
-
\$\begingroup\$ It was mean as a brain teaser to encourage looking into how a hardware language works. I'll update with the term 'verilog'. \$\endgroup\$– OldfartMay 3, 2018 at 10:36
-
\$\begingroup\$ aren't you just rephrasing the question? \$\endgroup\$ May 3, 2018 at 10:48
\$\begingroup\$
\$\endgroup\$
See this part of this answer to How is XCHG implemented in a 8086 processor?:
Using a hidden register. The 8085 has 2 hidden registers, but it is unknown if it used those registers for the xchange instruction. The 8086 has not been reverse engineered as of yet, so we don't know how many hidden registers it has.
Temp = A A = B B = Temp
answered Apr 21, 2019 at 13:03
\$\begingroup\$
\$\endgroup\$
The content of the DE register pair is stored in the WZ register pair then:
DE <= content of HL
HL <= content of WZ
