# Simple Mosfet driver

I need to switch 8 IRF9540 (P-Channel Mosfets) with about 32kHz (so 1 MOSFET about 4kHz) so that only one is On at one time. I thought about using the decade counter 4017 for this, and the 555 Timer for driving the 4017. Because of the low output current of the 4017 the Mosfet would take a long time to switch completly or am I thinking wrong? Is this a possible layout for a simple Mosfet driver for switching the mosfet faster than without the npn transistor?

EDIT: Maybe it's helping I have to switch 4A at maximum. It should switch with about 32kHz (so 1 MOSFET about 4kHz)

simulate this circuit – Schematic created using CircuitLab

respectively what is the differnce between these two schematics in switching speeds?

simulate this circuit

• Is it possible to switch my IRF9540's faster with this circuit? .... faster than what? – jsotola May 4 '18 at 18:15
• Look at the datasheet: vishay.com/docs/91076/sihf9530.pdf ...then decide how you are going to charge and discharge the 38nC gate. This is not a fast device by any means, so speed may be limited to many tens of ns. – Jack Creasey May 4 '18 at 18:29
• Terms like "as fast as possible" and "a long time" don't help anyone to help you. How fast do you NEED to switch it? – Finbarr May 4 '18 at 18:40
• More speed is not per-se desirable. You need enough speed to prevent heating. Too much speed = radiated interference from the switching noise. It is often desirable to drive fets through a resistor to make them slower. – Henry Crun May 9 '18 at 21:34
• Beware: the second schematic does not behave in the same way as the first. When you have a high logic level at the output of the 4017, there is a current through the 100Ohm resistor in the first one, and no current in the second one. – Charles JOUBERT May 10 '18 at 13:08

Yes, the transistor-resistor driver is helping.

A quick look at the datasheet of the MOSFET show Qin = 38nC and Cin = 860pF.

With I=2mA direct drive, switch time is t=Q/I=19us. With your driver, pulling up, the RC time constant is t=R*C=40ns (way faster), and pulling down, that BJT must have some current gain. So yes, it appears to help quite a bit.

That is the "back of the envelope" approximation. You can simulate it very easily to check for other "2nd order" effects.

• I don't agree with the value of Qin you give. Yes, it is in the datasheet, but for Vgs=-10V (-5V here) and Vds=-80V (-5V here also). There is a curve "Typical Gate Charge vs. Gate-to-Source Voltage" which gives about 4nC for the voltages used. But, yes, there still is a difference in the switching time. – Charles JOUBERT May 10 '18 at 14:54
• @CharlesJOUBERT, you are probably correct. The OP should check the exact values. Anyway, the switching speeds of both methods scale with gate capacitance/charge, therefore the relative improvement in switching speed by adding the driver will still hold regardless of capacitance/charge values. – jpcgt May 10 '18 at 17:56

The speed limiting thing in your circuit is the relatively weak pull up resistor R1 that has to pull the gate of the IRF9530 up towards 5V when Q1 is turned OFF.

Instead of Q1 and R1, you can use a digital logic IC with a push-pull output configuration like for example the SN74AHC04 capable of driving from 8mA up to 50mA (depending on the type).

But you could also build your own push-pull driver with a PNP transistor instead of R1. There might be a lot more options...

• Or just use a gate driver that is capable of switching the gate at several amps. They are cheap, easy to design in and are available with charge pumps to generate gate voltages that fully saturate the NFET with a low voltage power supply. – Dean Franks May 6 '18 at 18:56

Here is a question/answer on MOSFET gate driving. Summary: knowing the required gate-charge to go fully on or fully off, and the equivalent Cgate, besure you can switch that gate voltage is less than 1 microsecond (300nS tau is about right), to avoid Safe Operating Area failure.

Big loads turns MOSFET's on despite pull-down resistors

Have you considered using high speed high-side MOSFET driver instead of transistor? They specifically designed to keep MOSFETs reliably Off and to switch them faster. Something like IX4427

Edit: oops... I see @Dean Franks already suggested this

• The problem with such ics is that they are to "large" an i would need 8 for them, which is way more expensive than 8 npn transistors – Ribisl May 8 '18 at 15:55
• The one I suggested has 2 gates in one 8SOIC/8DFN package. That is more compact than 2 transistors+2 resistors. There are 4-gate chips like EL7457 and I believe you might even find 8-gate device that will replace all your parts by itself. The cost, of course, can be a limiting factor. – Maple May 8 '18 at 17:09
• Do I need the 4427 or the 4426 for a pmos? – Ribisl May 9 '18 at 15:10
• For PMOS you need inverting gate drivers, so 4426 (datasheet seems to be messed up). There are other dual options like MAX626, TC4426A or quad MIC4467. Also, you might be interested in single LTC1693-5 driver that is specifically designed for high-side PMOS configuration. – Maple May 9 '18 at 22:53

I will leave it to others to question if you need to do this at all...

The big problem with your circuit is that the R is in the source, and you do not have enough VGS to turn it on. You need gate voltage to go well above 5V (eg 10-15V) if you expect to get 5V at the source. You will only get a couple of volts across R in your circuit.

Dual NPN/PNP pairs make an easy, cheap, single component driver e.g. BC847BPDW1T3G

Also it does not draw idle current, nor require a very low value of R for fast operation

simulate this circuit – Schematic created using CircuitLab

BTW 74HC4017 has a pretty low output R anyway (prob 50 ohm) - it is able to deliver far more than 1-2mA. You can run it on up to 6V to get better drive to the fets. Still won't let turn the fets on enough to supply 5V - you will need 8-15V depending on fet.

• I would put a $10\Omega$ resistor in series with the gate of $M_1$, just to be sure that $Q_{1a}$ and $Q_{1b}$ will not run out of their $\mathrm{I_{CM}}$ limits. For the rest, I think that your analysis and the suggestion of using a push-pull gate drive are fine. – Daniele Tampieri May 9 '18 at 21:18
• I would be hard to convince that you could damage the transistors driving a few nF. But feel free to run the simulation in CL and convince me... – Henry Crun May 9 '18 at 21:30
• Sorry, but in the schematics given by Ribisl, R is in the Drain, not the Source: it is a P-channel MOSFET. What you write would be true for a N-Channel MOSFET like the one you give in your circuit (IRF530). – Charles JOUBERT May 10 '18 at 13:33
• @HenryCrun. Mmm... your're right. In your schematics, $\mathrm{R}_1$ limits the peak value of gate current to $I_{G_{pk}}\approx 12\mathrm{V}/100\Omega=120\mathrm{mA}$. I definitively should avoid to look at the Stackexchange at late night... – Daniele Tampieri May 10 '18 at 17:45
• @CharlesJOUBERT Well spotted! Which is why I don't use this fet schematic symbol, but instead one with an explicit d-s diode. It is not the first time I have done this.... – Henry Crun May 10 '18 at 20:53