# Attenuator with strong bias

I am trying to come up with simplest solution to reduce 0~2.5V DAC output to 0.09V swing and shift it into -19.34~-19.25V range for controlling current limit of OPA548 op-amp within 0~100mA. There is an example circuit in OPA548 datasheet but it uses single power source and full current range, so all they had to do is buffer DAC output and keep it above ground.

After researching dozens of examples on the web (like these: voltage shift, another one) I ended up with two options:

1. basic inverting attenuator with bias
2. inverting summing amplifier

Technically, I think the latter one is also attenuator, since individual input gains are 0.8 and 0.036.

What bothers me is that about 80% posts on the web claim unequivocally that configurations with gain < 1 are unstable. The rest are equally adamant that this is wrong (see unstable op-amps). It should be possible to "shrink" DAC output with resistor divider enough to use gain > 1, but I always prefer simplest possible solutions.

My question(s): Will these work and if yes than which one is better? Are there other options available?

UPDATE:

• Required signal bandwidth might be useful – PlasmaHH May 5 '18 at 21:27
• error tolerance? budget? Vee= -24v? – Tony Stewart Sunnyskyguy EE75 May 5 '18 at 21:59
• Bandwidth is limited by SPI DAC, so I think it is irrelevant here. In any case under 1KHz. – Maple May 5 '18 at 22:16
• The resistor values you see are straight from calculations, I will adjust them to standard values later. The tolerance for current control is relaxed, I can afford losing 10~15% of DAC range to adjust output in software. Budget is non-issue since this is one-off project. The OP-Amps are on ±24V dual supply, the rest is on 3.3V – Maple May 5 '18 at 22:22
• Neither design is acceptable with tolerance errors. You need a current mirror – Tony Stewart Sunnyskyguy EE75 May 6 '18 at 11:02

One important other option includes more careful reading of the application section.

In section 8, on page 12 of the datasheet (as you can see in the image), it says the following:

Later, on page 18, figure 30 it shows even more blatantly how it works:

Which means, simply, that if you drive a voltage on the Ilim pin, you use the internal resistor to generate the 0 μA to 330 μA current, 4.75V across 13500 Ohm creating 350 μA. That's probably to give some margin, with some internal structure limiting to about 5A anyway.

So, what you want to do is just draw between 0 μA and 7 μA from that limit pin. Which is on the high-end of the internal voltage source, so you can very, very simply create a current drain with an NPN or N-MOS transistor, which gets driven by a much higher level voltage. In fact, given sufficiently accurate components you would need no Op-Amps for the purpose at all.

The only reason they cannot do the same trick, is because they want the full current range and a current drain would take up one or two volts, not allowing anything above 2 A to 3 A.

This set-up might already be accurate enough for you, though you specify nothing to make me know either way:

simulate this circuit – Schematic created using CircuitLab

Q4 and Q2 become diodes that match the base-emitter voltage drop in Q3 and Q2 respectively. Though, of course, they have different junction currents, thus their voltage won't be an absolutely exact match, but it should be close enough. Using these transistors in μA range collector currents may not be super linear, there may be more accurate models. Of course similar tricks can be done with Op-Amps, but those are more trivial and easy to find elsewhere.

When you apply 0V at the DAC node, the diode drop in Q4 creates a negative voltage on the base of Q3, which then tries to force approximately 0V at its emitter. This puts 2.5V across R3. This drains 700 μA through it (actually 714 μA, but that looks too much like a traumatic 741), which makes its way (give or take some leakage and such) to R1, which creates 700 mV across R1.

Because Q2 acts as a diode again, the base-emitter drop of Q1 is compensated, and the same voltage falls across R1 (again, give or take some leakage and non-linearities). 700 mV across 100 kOhm equals 7 μA, which must come (mostly) from the collector, leads to a limit of a bit above 100mA. Whatever voltage needs to be on the I-LIM pin for that to happen will be there, through the magic of how transistors work. Given that that voltage is at least a few volt above the V- supply, so it has some room to work in.

Apply 2.5V on the input (the maximum Vref) and 0V falls across the R3, no current flows, no current comes down, no voltage across R2, no voltage across R1, no current through R1, no current from the I-Lim pin, current limit is set to zero.

It just occurred to me after all this writing, that if you just tie what I labelled "In from DAC" to ground, that creates a virtual ground-point from which current flows downwards into the NPN group (Q1/Q2). If you then connect the DAC to the top of the resistor a positive voltage creates a current, no voltage creates no current. Both removing the need for having the 2.5 Vref externally available and making it non-inverted current control.

Of course, you can also manipulate the maximum range by just inserting an extra resistor in the voltage-control signal. If you apply V- to the I-LIM pin, you create 330 μA drain. If you want that to be much, much less, you just need a much, much bigger resistor than the one that's inside. To be precise, you'd need a total resistance (external + internal) of 4.75V / 7 &mu;A =~ 678 kOhm. Clearly that's a pretty beefy resistance to combine with what is meant to be a piece of power-electronics.

Which ever way you go, I strongly feel manipulating the current you drain from the pin is a much more sensible way than trying to make your voltage signal infinitesimal compared to the supply ranges.

All that said...
Have you tried to actually look for a part or solution that isn't over-dimensioned for your use by one and a half order of magnitude? When you go to orders of magnitude too large, these are the kinds of problems you often run into.

As a final aside, sub-unity gain inversion with op-amps is dangerous, only because unity-gain can be very sensitive to instability and oscillations. If you have a unity-gain stable Op-Amp the chances of it behaving well at sub-unity gain inversion are more than good.

If you are ever worried about unity-gain stability in a prototype project, what you can do is add an extra 0 Ohm resistor to the output, before it feeds back to the negative input terminal and an open component from behind that resistor to ground. If you then get problems in unity or sub-unity this allows you to add bandwidth reduction or compensation without having to cut up your board too much.

• The simplicity of the circuit is actually my primary goal. It took me an hour to get through explanation how your circuit works and I am still not sure I got it right. In any case, I did read the applications section thoroughly. That is where I found DAC example (fig 32 on page 20) and hoped I can tweak it to my ±24V supply case. I think I'll take your comment about sub-unity gain as a "go ahead" (ADA4522 is unity-gain stable) and try one of the circuits above. Question is - which one. – Maple May 5 '18 at 23:38
• @Maple If the maths is right - don't much care to check after 1:30AM - and there isn't supply rail noise, either. If you use voltage manipulation with 0.1V range and there's 25mV noise (= very little on +/-24V) on the primary rails, that isn't 1:1 coupled to all other rails, the one that uses -24V as a reference at least makes it somewhat more likely you get close to expected results. But then you need to really not have that capacitor in there, as that will dampen and/or phase-shift your noise on that rail. Of course, ground noise is a thing too. – Asmyldof May 5 '18 at 23:44
• In the end it all keeps coming down to trying to use something at 1/50th of its intended range, forcing you into mucking with milivolts or fractions of microamps in the presence of 24V rails. Not something I'd be involved with if there was an easy way to avoid it, like using a different low-current solution to the initial problem. And I actually often get paid for mucking with microvolts and nanoamps. – Asmyldof May 5 '18 at 23:51
• Maple, never use +24V in your design unless it is 24.00V. Do a tolerance test. Current sinks are needed as done in answer – Tony Stewart Sunnyskyguy EE75 May 6 '18 at 7:15
• Rule of thumb, anytime you find yourself writing things like "0.09V swing and shift it into -19.34~-19.25V" you need to stop and have a rethink, it can be done but is going to give you something hugely sensitive to that 19 odd volts shift. The current mirror is better in all ways. – Dan Mills May 6 '18 at 12:12