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My classmate told me using a mos (body connect drain)as a switch may have leakage current,because there is a parasitic diode in that MOS,so there will have a leakage current.so i have to connect the diode to the higher voltage,but the voltage of source and drain will change,and my classmate told me the floating Nwell will help me.

However,after finding some information,i found the floating Nwell is the related to the processm,not the schematic,so i want ask can anyone show me the floating Nwell schematic and introduce it to me?thankyou

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The PFET will be implanted within an N-bulk region. If raw wafer is P-type, then a N-well must be added so the necessary PFETS can be built.

IN my experience, its your choice where to tie the N-wells. Dittos for PWell processes.

Handling high-voltage switching is a useful method, and those wells become your key to success. Of course there is lots of capacity from the well to bulk, and the displacement currents must be supplied, somehow.

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