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Here is a peak detector comparator schematic ,its symbol,and its simulation.I have some question about them.

First,we all know the Schmitt trigger symbol is the same as the second picture,so are Schmitt trigger and peak detector comparator the same ?

Second,If they are actually the same,its simulation seems strange,i know the process of Schmitt trigger,the reason i think strange is that why is that two input are rising,but the output become low.The output become high,only at the red line rise rapidly

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(1) peak detector comparator schematic

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(2)Symbol

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(3)Simulation

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  • \$\begingroup\$ Peak Detector comparator may have NO hysteresis, so even a small additional signal will push the "peak hold" value up. \$\endgroup\$ – analogsystemsrf May 6 '18 at 2:22
  • \$\begingroup\$ @analogsystemsrf so for this simulation,is this simulation right? \$\endgroup\$ – XM551 May 6 '18 at 2:24
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Are a Schmitt trigger and peak detector comparator the same?

The answer is no. A Schmitt trigger has a narrow window to cross to get a logic '1' or '0' at the output. It is a small percentage of positive feedback that does this, therefore this window is fixed based on the Vcc of the Schmitt IC, and normally is always a positive value.

They do have benefits in certain situations where background noise is tiny compared to the wanted signal or a square wave has a little bit of distortion, possibly from the effects of a transmission line.

A comparator is very flexible, whether it is comparing peaks or odd wave forms. Its trigger point is very flexible. It could be a positive or negative window to cross. In many comparators it can be close to the power supply rails.

The designer also has the option of adding maybe 5% feedback (hysteresis) to create a window of a arbitrary width which must be crossed to one side or the other for the comparator to change state.

For this reason comparators are better at being a simple noise filter where your wanted signal has high percentage of noise and/or distortion riding on the signal. This can act as a clean-up stage before being fed to digital logic (Schmitt trigger?) or an ADC.

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