On the product I am designing, I have an input connector of 60 lines and an output connector of 32 lines.
The input can be connected to different outside products and then the lines can be mixed, so the idea of the product is, more or less, to remap the relevant input lines to the output ones.
For example, the output line Number1 can be connected to the input line number 1 or the number 2 or 55. Same thing for number 2. Meaning my product is more or less a huge multiplexer between 60 inputs and 32 outputs.
The first that came into my mind to do that fairly easily, and to be able to change the configuration if needed in the future, is using a CPLD. My problem is that I am inexperienced with CPLD and I do not know at all at what kind of characteristic I should look for in the datasheet.
Would this kind of project take a lot of resources in a CPLD?
What are the characteristics that I should look for to be sure the CPLD I choose will have enough resource (flip-flop? gate? macrocell?)?
How can I do a rough estimation of the required resources for this kind of project?
To add information there is actually two different possibilities for the CPLD that arised from previous answers. First possibility is to just do what is required statically, meaning once the CPLD is programmed the configuration between input and output will not change until the next programmation.
The second possibility is to be able to change the configuration dynamically without reprogramming the CPLD, for example by SPI would be nice.
The questions I asked before are for both possibilities.
Also My inputs are synchronized between each other and the maximum frequency will probably be around 5MHz, how do I estimate the delay between input and output and the desynchronization due to the different paths in the CPLD?