I have a function f(x,y,z,w)=x.y.z+ y’.z’+x’.w’ and I need to make a circuit using two 3 to 8 decoders, an inverter, an or gate with as many inputs as we want (I use two because I need a 9 input one and on DEEDS I found up to 8) and up to 16 and gates (???). So far I've made this circuit based on the fact that f= Σ(0,1,2,4,6,8,9,14,15). Logic circuit

I don't seem to figure out where the AND gates go. Also, this circuit is not working properly as it returns 0 when y and z are 1 which, by the truth table returns 1. I provide the truth table below. Truth table of f

Why is this happening? Aren't the outputs of the decoders the minterms of the function? (e.g. D0= x'y'z'w') Also, any suggestion about the AND gates and the solution? No need for the full solution just some help to guide me.

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    \$\begingroup\$ Check your labeling of the inputs vs. your truth table. \$\endgroup\$ – Spehro Pefhany May 9 '18 at 18:48
  • \$\begingroup\$ you do not have any AND gates in your circuit \$\endgroup\$ – jsotola May 9 '18 at 18:52
  • \$\begingroup\$ Really. As Spehro says, check your wiring. \$\endgroup\$ – WhatRoughBeast May 9 '18 at 18:52
  • \$\begingroup\$ You say nothing about being allowed to use ORs, yet you do have these. \$\endgroup\$ – mike65535 May 9 '18 at 19:04
  • \$\begingroup\$ Greatly sorry, forgot to add that! \$\endgroup\$ – butterflyflyaway May 9 '18 at 19:08

With what you have in the truth table and what you have wired in the output (right) side of the 3:8 decoders, the input (left) side of the decoders should look like this:

y --> A2

z --> A1

w --> A0

You mixed the LSB of input with MSB.

  • \$\begingroup\$ Thank you! That helped, I wasn't quite aware of this. Do you have any clue how I could use the AND gates in this circuit? \$\endgroup\$ – butterflyflyaway May 9 '18 at 18:59
  • \$\begingroup\$ AND gates are unnecessary. \$\endgroup\$ – Mitu Raj May 9 '18 at 19:13
  • \$\begingroup\$ Please make the fixes MITU RAJ suggests \$\endgroup\$ – mike65535 May 9 '18 at 19:15
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    \$\begingroup\$ well you can substitute OR gate with NAND gate equivalent. And then substitute all NANDs with ANDs and NOTs .... Hm but tiring job :P \$\endgroup\$ – Mitu Raj May 9 '18 at 19:20
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    \$\begingroup\$ AND gates would replace the decoder, as that it what it is... 8 3-input AND gates per decoder. Maybe he mentioned it as an option to a decoder or just didn't tell you why he mentioned them(?) Anyway, seems you got it now. \$\endgroup\$ – CapnJJ May 9 '18 at 19:50

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