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Take as an example a CPU that is capable of changing its clock speed, like a modern computer CPU (Intel, AMD, whatever). When it does a certain calculation at a particular clock speed, does it generate the same amount of heat as when it does the identical calculation at a slower clock speed? I know that heat dissipation and heat buildup are different issues, so let's just talk about raw heat generated.

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  • \$\begingroup\$ A calculation made with a higher speed is taking a shorter time. \$\endgroup\$
    – Eugene Sh.
    May 9, 2018 at 19:39
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    \$\begingroup\$ In a computer that is ideal in the Landauer sense, I think the calculation would produce the same amount of heat energy. But in real-world computers, it's probably going to differ. Particularly because the amount of heat that's already been generated and not yet dissipated (i.e. the temperature of the semiconductor) is going to affect its properties and thus the heat it generates. \$\endgroup\$
    – Hearth
    May 9, 2018 at 19:42
  • \$\begingroup\$ Of course it will, I've designed some FPGAs designs and we needed it to be low power. Therefore, we used a 10kHz clock source instead of the 1MHz source as we didn't need that much processing power. \$\endgroup\$
    – lucas92
    May 9, 2018 at 19:52
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    \$\begingroup\$ The dynamic power consumption is proportional to square of clock frequency in synchronous ckts. So heat should increase too. \$\endgroup\$
    – Mitu Raj
    May 9, 2018 at 20:02
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    \$\begingroup\$ @MITURAJ, dynamic power consumption is proportional to clock speed. Not square of clock speed. Proportional to square of voltage. \$\endgroup\$
    – user57037
    May 10, 2018 at 22:37

5 Answers 5

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Besides clock speed, keep in mind that in a real "big" CPU (one that has caches, a MMU, TLBs, pipelined execution, SIMD, etc) another important factor of how much heat is generated would be how well the instruction flow utilizes the available CPU resources. If you run a program that is memory-intensive, most of the time the CPU would be just starving for data, doing nothing, so the heat produced would be relatively low. A purely computation code with tight loops would heat more. Even more heat could be generated with tightly optimized code that incurs almost no branch mispredictions, uses the SIMD units intensively, makes optimal use of the caches and so forth.

There are programs specifically designed to operate the CPU in this mode - stressing it as much as possible, Prime95 being a prominent example for the PC.

In fact, if a PC already runs Prime95 on all available CPU cores, and then you concurrently start another CPU-intensive application (e.g., 3D rendering), you'd notice that the CPU cools down. This is because it has to timeshare the very heavy Prime95 code (that "lights up all the transistors") with the relatively lower-demand rendering code (which likely has a lot of cache misses and branch mispredictions - those allow the CPU to stop for a while and cool down).

Another thing you should factor in is that usually each CPU has a table with allowable clock speeds, and core voltages associated with each speed. Lower clocks are also matched with lower voltage, as the manufacturer has determined that the CPU will be stable at that voltage. Power consumption varies roughly linearly with clock speed, but quadratically with voltage.

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    \$\begingroup\$ Power varies quadratically vs voltage for a given clock speed. Usually you use the voltage to linearly vary the clock rate. As a result, power is cubic vs voltage, while clock speed is linear. So power consumption is quadratic vs clock speed. \$\endgroup\$
    – MooseBoys
    May 10, 2018 at 3:06
  • \$\begingroup\$ SIMD can generate so much heat that some CPUs overheat when using AVX512 extensively. +1 for pointing out that the voltage increase is relevant, too. \$\endgroup\$
    – forest
    May 10, 2018 at 3:41
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    \$\begingroup\$ @MooseBoys, true, very good point. But it's worth pointing out that in reality, if a full-speed CPU has Vcore=1.2V, halving the clock speed wouldn't allow for Vcore = 0.6, it just won't work :) \$\endgroup\$
    – anrieff
    May 10, 2018 at 7:13
  • \$\begingroup\$ @anreiff I might be misremembering, but I think some modern Intel chips will step all the way down to 0.8V or so while idle. They're only at ~700MHz at that point though, and the cache is probably turned off. \$\endgroup\$
    – mbrig
    May 10, 2018 at 15:58
  • \$\begingroup\$ The thing is that they don't go to near 0V, as one might expect if CPU clock speed and Vcore were proportional. It is more like [email protected] and [email protected]. The reduction in speed has more effect on power dissipation than the voltage, even if the former affects it "only" linearly. \$\endgroup\$
    – anrieff
    May 10, 2018 at 19:04
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Power consumed is proportional to the transition rate of the clock and the conduction losses with switching those effective capacitor gates. Temperature rise however is proportional to the power consumed times effective thermal resistance , in degrees C per watt and thus is independent of energy, or rather may run cooler or hotter depending upon the power consumption and not spreading that power over a longer period of time. There may be a formula that shows that temperature rise with clock speed is some fractional power of power greater than one.

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  • The wattage will be lower at the lower operating frequency.

  • At the same core voltage the total energy would be higher at the lower clock frequency.

  • But if the core voltage is adjusted down with frequency then the total energy may be less.

  • For algorithms that spend most of their time waiting for I/O operations, the execution time will be approximately constant regardless of core clock frequency. Therefore the total energy required for the calculation will go up proportional to clock frequency.


    The power consumption of a CPU consists of two parts.

1) Static current draw (I_static). For some particular supply voltage and temperature this current draw is constant regardless of what the CPU is doing.

A CPU made using CMOS technology consists of thousands or millions of MOSFET transistors. Static current draw is primarily due to the combined off state leakage current of millions of MOSFET transistors.

  • Static current draw usually increases as the supply voltage increases.

  • Static current draw usually increases as the CPU temperature increases.

  • Static current draw is for many devices much smaller than the dynamic current draw.

2) Dynamic current draw. For a processor constructed using CMOS processes the dynamic current occurs as transistors switch between on/off states.

  • For a specified supply voltage the dynamic current draw is usually directly proportional to frequency.

  • Dynamic current draw increases as supply voltage increases.

The reason is as follows. Each MOSFET transistor in the CPU has a certain amount of capacitance associated with it. Each time a MOSFET switches; a charge Q = C * V is needed to charge/discharge that capacitance.

The dynamic current draw for each transistor is I_dynamic = C * V * f.

Regardless of what frequency the instructions are executed at, a particular set of operations on a particular CPU (assuming identical behavior from the cache, and memory) consumes a certain amount of total charge (Q_program) due to dynamic current draw, regardless of the frequency that the instructions are executed at.

But if the instructions are executed more slowly then the total charge due to static current draw will be higher because more time has passed.

Mathematically one could write...

W = (I_dynamic + I_static) * V_supply

E = W * time = Q_program * V_supply + I_static * V_supply * time

We can see that as the clock frequency approaches 0 the wattage will approach a fixed value, but the energy required to compute the program approaches infinity.

So if (based on the capacitances of the CPU transistors) Q_program is fixed for a particular supply voltage and set of operations, how do modern CPUs save power by lowering their clock frequency? The answer is that most modern CPUs either include onboard (or in a companion chip) an adjustable core voltage regulator. When they lower their clock frequency they can also lower their core voltage. Q_program (and E_program) then lowers proportionally with the supply voltage.

Note that the CPU can't use the lower voltage at the higher frequencies because at lower voltages the transistor switching time increases.

Wattage is proportional to both voltage (squared) and current draw. So if the voltage is dropped concurrently with the frequency then the wattage drops with the cube of the frequency.

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Transistors use energy, which is wasted as heat. There are two mechanisms, static and dynamic energy. The static energy is constant, and the dynamic (switching) energy occurs whenever it changes state (0->1 or 1->0). Dynamic (switching) energy is usually the greater source of heat than the static. The calculation you want to perform will take the same number of clock cycles, and cause the same number of transistor bits to flip regardless of clock speed. Hence the dynamic heat is the same for both situations. The static heat is ... static. So in summary, assuming the CPU is ONLY doing this 1 calculation then the energy / heat consumption is exactly the same when averaged over a given time period.

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  • \$\begingroup\$ You are riding the edge of the truth, but I will let it get by. The energy level for CMOS goes up almost in a linear line with frequency of operation, but double the voltage and the energy quadruples. Nasty I2R equation, not including speed. \$\endgroup\$
    – user105652
    May 10, 2018 at 8:41
  • \$\begingroup\$ The OP asked purely about clock speed, no mention of reduced voltage. \$\endgroup\$
    – TopCat
    May 10, 2018 at 8:44
  • \$\begingroup\$ An above answer mentioned the penalty for core voltages. I did not imply you needed to answer to that issue. I was only making a comment - in a comment box. \$\endgroup\$
    – user105652
    May 10, 2018 at 8:51
  • \$\begingroup\$ The question was about HEAT (measured in Joules), not power or temperature. Heat is a form of energy. Except for the small amount of energy received from input sources and delivered to output loads, all of the energy consumed in the device will become heat and will eventually be dissipated. In CMOS logic, energy consumption generates heat when the machine state changes-- normally once per clock cycle during that moment in time when gates are midway between 0 and 1. So the HEAT for a given task should be independent of clock speed and totally dependent on the number of clock cycles. \$\endgroup\$ May 10, 2018 at 18:16
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In the scenario you described, the energy required for the calculation does not depend on the clock speed. But heat can be a "squishy" term. Let's say the calculation takes 1 Joule. If you do it in 1 second, that is 1 Joule/sec = 1 Watt. But if it takes 2 seconds, that is 1 Joule/2sec = 0.5 Joule/sec = 0.5 Watt.

The processor will definitely reach a higher temperature if the calculation is done faster, because the energy is released faster. I don't think there is too much point in me saying more than that.

Oh, except that the numbers I have given you are not meant to be realistic. It is just the concept.

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