0
\$\begingroup\$

I'm working on a project were we are making PCB for measuring weight with 24-bit ADC (AD7792), MCU and GSM module.

Because those measurements are highly sensitive, we are considering AGND and DGND separation.

I know that for this project most of you would recommend 4 layer board, but due to some circumstances (long story) we can make it only now in 2 layers.

So my questions are:

  1. When we use ground plane on bottom layer, are there any benefits of using ground pour on top layer where signals our routed? In case of AGND and DGND planes on bottom side, is it good to even have a ground pour on top side because of coupling noise with AGND on bottom?
  2. I saw on OpenScale board (https://www.sparkfun.com/products/13261) -> under the documents, eagle files, that they route signals under both side. Is it a good practice to route few cm long traces on ground plane?
  3. Also on that board I saw that they are connecting top ground pour to every ground pad. Is it good idea? I thought that ground pour is only here to curve electric filed (reduce crosstalk) and that no return current should flow through it. And that return current should flow on ground plane underneath signal trace to cancel magnetic filed of above signal.
  4. How should ground pour be connected to power supply gnd? Is it grounded to bottom ground plane with vias? In that case how to avoid "strange" currents paths when we are doing ground plane separation?

Thank you!

P.S. Sorry if my question are confusing and in some term repeating, I'm so confused with all this in that case that I can't even write concise question :)

\$\endgroup\$
0
\$\begingroup\$

One could write a book on this topic (and few did). I can only give you a few hints as this topic is too big.

Rule 1: Current loops must be minimized. (But even this is a book for itself)

Rule 2: Minimize common signal paths (e.g. apply star grounding).

Rule 3: Don’t care about top planes, this is not really important. But if you use top planes, then contact them with a hell lot of visa to the bottom plane.

I will give you some additional hints to these rules:

1) Identify each current source in your design and provide a minimized loop for the return current. Even IC supply pins are high frequency current sources, that’s why you need a bypass cap as near as possible to short this current source to the other IC supply pin (Caps are a short for high frequency).

2) If you have identified a current loop of a signal trace, try to keep this current loop away from ALL other current loops, because they will harm your signal. Properly done, this will result in a star grounding concept, where each of the current loops is isolated and your GND current return paths are connected in a single point (not necesseraly a GND plane!).

3) If you follow these rules, you might not need GND plane separation. I think GND plane separation is generally a bad thing, because it may contradict rule 2.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.