I made a board with a STM32F031 and connected it to the ST-Link integrated into a STM32F4-DISCOVERY. To this point I was able to figure out, that the SWD connection works, if I supply a voltage of <2.9V via an external laboratory PSU. Anything above crashes the communication, but it returns as soon as I go down to 2.9V again.
I must confess, that I didn't do proper decoupling of the VDD pin (just 1uF + 100nF) and I will fix it accordingly to the STM32F0 Reference design for my next revision.
Also I attached an oscilloscope to the VDD line but couldn't detect any significant spikes. Also I removed all components somehow related to the VDD line (LDO, other chips), so it's basically just the STM32 with some FETs attached to its GPIOs.
Here's a log of openocd:
Info : Unable to match requested speed 1000 kHz, using 950 kHz Info : clock speed 950 kHz Info : STLINK v2 JTAG v30 API v2 SWIM v0 VID 0x0483 PID 0x3748 Info : using stlink api v2 Info : Target voltage: 2.887324 Info : stm32f0x.cpu: hardware has 4 breakpoints, 2 watchpoints Info : Listening on port 3333 for gdb connections Error: jtag status contains invalid mode value - communication failure Polling target stm32f0x.cpu failed, trying to reexamine Examination failed, GDB will be halted. Polling again in 100ms
The Error, as I mentioned above, occours as soon as I go above 2.9V on my PSU. I find it odd that I have this target voltage line with ~2.89V, which is really close to my error threshold.
So I wrote a little Blinky programm, flashed it with SWD while the supply was 2.9V and then ran the chip with 5V on it's LDO resulting in VDD@3.3V, and it works. I dare to assume the Target voltage is not respected by the integrated stlink-v2 on the Discovery board. Ordered a stand alone, will update.
Stand alone STlink brought no difference, creating a second revision of the board with all caps as per reference design now works. Still, I was unable to reproduce the error with a STM32Ardurino board removing all the caps.