1
\$\begingroup\$

I can't understand how MOSFET LDO works and when it would be low drop.

Below, there is a simple schematic with N channel mosfet and TL431. Providing gate voltage, D-S will open, but minimum Gate-Source voltage for eg. IRF540 is 4V (for 1A drain current). Load is connected between source and GND, so minimum Gate-GND voltage is Vout+Vgs=Vout+4V, so whole Vin is minimum Vout+4V.

Do I understand it correctly?

Circuit schematic

|improve this question
\$\endgroup\$
  • 2
    \$\begingroup\$ Using a regular NMOS for the series regulation probably is mutually exclusive with it being a LDO. Typical series regulation parts are PFET/PNP. This still could work as a linear regulator, but many people conflate/confuse the two terms. \$\endgroup\$ – W5VO May 19 '18 at 15:28
  • \$\begingroup\$ @W5VO You are aware that an LDO regulator is a linear regulator? \$\endgroup\$ – marcelm May 19 '18 at 17:25
  • \$\begingroup\$ @marcelm And that's the exact problem that I'm talking about - so many people are used to the statement "LDO == Linear Regulator" that they assume the commutative property "Linear Regulator == LDO". Next time find a way of saying that without patronizing people. \$\endgroup\$ – W5VO May 19 '18 at 21:42
4
\$\begingroup\$

Your circuit works as an LDO regulator but only because there is a 5 volt power source that can lift the gate 5 volts higher than the input supply voltage. This means that if you only need 4 volts gate-source there will be virtually a zero voltage drop-out performance.

All linear LDO regulators that I know of don't have this useful but impractical voltage source hence they use PMOSFET transistors.

|improve this answer
\$\endgroup\$
  • 2
    \$\begingroup\$ Actually there are a fair number of LDOs with a bias input intended to be used with a low-current higher voltage rail to get lower dropout, so sometimes when the extra voltage source exists anyway it can help get very low dropout on another rail: ti.com/lit/ds/symlink/tps7a10.pdf \$\endgroup\$ – John D May 19 '18 at 16:11
  • \$\begingroup\$ @JohnD Nice find so now I can say that I know of no regular LDO regulators and only 1 irregular LDO regulator (that requires a low current bias voltage 1.4 volts above Vin). \$\endgroup\$ – Andy aka May 19 '18 at 16:23
  • \$\begingroup\$ So only solution is to change N MOSFET to NPN BJT? Am I able to reduce dropout using P channel and TL431 in similar configuration? \$\endgroup\$ – kamillabaarnowak May 19 '18 at 16:53
  • \$\begingroup\$ @kamillabaarnowak - no with a PMOSFET you will need an extra inversion of the signal and you get an accompanying level of instability that you have to fight against / correct in the design. Not a simple step. Anyway that question, if you are interested in a fuller answer would best be served by googling how they work and if you have issues ask a new question here. \$\endgroup\$ – Andy aka May 19 '18 at 19:33

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.