I am doing my first 6-Layer PCB with RF antenna connection tracks.
I am using this stack-up:
L1 Signal Layer
L2 Ground Plane
L3 Power Plane
L4 Signal Layer
L5 Ground Plane
L6 Signal Layer
I have some questions in my head:
The power plane is splitted into 3 different voltages. As every signal layer has a reference solid ground plane close to it, it is not that important to cross power planes sections in signal layers because the return path will flow in those ground planes, right?
In the bottom layer there are two antennas (one chip antenna and one ufl connector). In this case I think I should place a GND polygon pour in the bottom layer with many stitching vias to the ground plane, right? if so, is there any rule for placing those vias? (how many? where?) and what via size should I use? Should the polygon cover the whole PCB or just the zone containing the antennas?
A lot of questions, sorry! :)