0
\$\begingroup\$

I'm really new to Electrical circuits so please bear with me. I studied how set latch works :firstly, input 0 then Q(let's say output and it's 0 i this case) feedback another input resulting output 0. Then if I input 1, the output Q turns into 1, as a result it latches 1.

Here's my question. How do you know that output Q is 0 in the first place even though there is only one input gets 0 (the other input is affected by the output)?

\$\endgroup\$
  • \$\begingroup\$ Is this a study room to find a simple answer already in textbooks and datasheets? \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 May 24 '18 at 17:32
  • \$\begingroup\$ @TonyStewartolderthandirt, textbooks like to start out an explanation with, "Assume that..." and then never explain why you're assuming it. Datasheets aren't in the business of explaining basics to beginners. \$\endgroup\$ – Annie May 24 '18 at 18:17
  • \$\begingroup\$ Yes all steps in learning have pre-requisites in experience and the best tools are a web search engine and knowing how to use key words with -notthis \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 May 24 '18 at 18:32
  • \$\begingroup\$ The answer here is : you never assume and use a power on Reset or set. \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 May 24 '18 at 18:34
  • \$\begingroup\$ @Annie example: google.ca/…. I prefer to teach how to fish than give free fish answers unless based on unique experience. Otherwise it gets too redundant and time waster. \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 May 24 '18 at 18:38
2
\$\begingroup\$

When analyzing the behavior of a latch when the inputs are in the "hold" condition you don't know what the stored state of the latch actually is. So, you assume that the stored state is a '1' and verify that all of the other signals in the latch will be consistent with that assumption. Then, you assume that the stored state is a '0' and verify that all other signals are consistent with the new assumption. If so, then you have a valid latch circuit and you've identified the input conditions that cause the latch to retain its state.

By the way, you can't make a latch from two OR gates. You need to use inverting gates such as the NOR or NAND.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.