I am working on a project which uses the LTC4020 multi-chemistry battery charger from Linear Technology. The design includes a microcontroller ( NXP KL25Z) to provide additional outputs and communication capabilities.

The LTC4020 must be connected to SGND (signal ground) and PGND (power ground), both planes must be connected at a single point to follow the star ground philosophy. In the DC2044A demonstration circuit this connection is made directly under the IC as shown in the image below, so I tried to follow this approach in my PCB.

Ground plane connections in the demonstration circuit

The microcontroller has separate pins for analog and digital grounds (AGND and DGND), so we have a total of four grounds in the design (SGND, PGND, AGND and DGND). I think we can treat SGND and AGND the same, but I am not so sure about what to do with the remaining grounds.

In the article "Staying well grounded" from Analog Devices, the author suggests that the analog ground must be used as the return path for the analog and digital circuitry in mixed-signal devices, provided that the return currents from the digital section are not too high. Unfortunately, I do not believe this is the case with the microcontroller.

On the one hand I wouldn't like to use the AGND/SGND plane as the return path for the digital circuitry of the microcontroller because the fast switching transients may inject some noise in the analog section, but on the other hand using three different ground planes might not be a good idea.

Is using three different ground planes the best approach in this application?

What is the best strategy to connect these three ground planes?

Thanks in advance.


Suppose you need 1 millivolt noise floors for the battery charger. Suppose the Microcontroller edge rates cause 1GigHertz energy movement, Suppose the return-path inductance is 10 nanoHenries (about 1cm of wire, or 10cm of GND plane). Suppose the Microcontroller has 5 volt transitions, into 10pF loads.

How much noise?

5 volts at 1GHz across 10 pF ===?

Z(10pF at 1GHz) == -j15.9 ohms. Call it 16 ohms, in our pretend precision.

Current into the 10pF (that current needing a return path) is 5 volt / 16 ohms, or 300 milliAmps (peak, peak-peak, RMS --- we will ignore that).

What voltage drop across the Return path (the GND path)?

Z(10nH at 1GHz) == +j63 ohms. Call it 63 ohms.

What voltage drop? V = I * R = I * Z = 0.3 amps * 63 ohms = 18.9 volts.

But we only have 5 volts. Thus this circuit needs to be modeled with the Z(inductor) limiting the current, not just the capacitance limiting current.

What we do learn? this is a very noisy problem, under the assumptions I've give you.


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