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We use a coupling capacitor to remove the dc component from the output in simple ac amplifier circuits.

In below base biased CE amplifier, the voltage at collector node is not ac, it is pulsating dc with an average value of 15V. After coupling capacitor it becomes ac with average value of 0V.

enter image description here

How do they manage this in an op-amp ? Since op-amp works for dc inputs too, wouldn't a coupling capacitor block both the input and the quiescent bias voltages ?

For ex : As far as this question is concerned, I hope we can assume op-amp is just a two transistor differential amplifier with single ended output and let the gain be 1000; then putting 1mV dc at input gives 1V dc at ouput, but this floats above the already existing quiescent bias voltage of the transistor. If I use a coupling capacitor, it blocks both the quiescent bias voltage and the amplified input voltage. But we want to block only the quiescent bias voltage, not the amplified input voltage. Capacitor blocks all the dc, it doesn't know what is bias and what is input, so I feel we cannot use a capacitor here.

enter image description here

In above circuit \$V_1\$ is dc input and the output is \$V_{out} = V_{CE} + 1000*V_1\$, where \$V_{CE}\$ is the quiescent voltage of Q2 transistor. But we want to remove \$V_{CE}\$ from the output in practical circuits right ?

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  • \$\begingroup\$ Did you have a specific question? Please put all your questions last, and related to the same subject. \$\endgroup\$
    – user105652
    Commented May 27, 2018 at 3:24
  • \$\begingroup\$ what you've drawn is not an op-amp, it a differential pair, just part of an op-amp. \$\endgroup\$
    – Neil_UK
    Commented May 27, 2018 at 4:13
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    \$\begingroup\$ The 741 is a good example to study. Do you see any global NFB from the output back to either of the inputs? No? The gist is that the opamp uses external NFB networks in order to stabilize the output. If you tie the non-inverting input to ground and tie the inverting input to the output, the output will show a value close to ground (exhibit the offset voltage.) However, if you tie both inverting and non-inverting inputs to ground... with no NFB at all... what do you think the output might be? \$\endgroup\$
    – jonk
    Commented May 27, 2018 at 6:45
  • \$\begingroup\$ @jonk interesting... When both inputs are tied to ground, the output should be ideally 0V because the op-amp amplifies the difference of inputs. I feel this may not happen practically, otherwise you wouldn't be asking this question. (1/2) \$\endgroup\$
    – AgentS
    Commented May 27, 2018 at 6:59
  • \$\begingroup\$ With an open loop gain of \$10^5\$, the op-amp just needs a tiny input voltage difference of \$\dfrac{15}{10^5}=150uV\$ to saturate. I believe input offset current or the variations in component parameters can easily develop this small voltage at the input and the output saturates to either +15V or -15V. We may not know which value it settles at. It is random. Is my understanding correct ? (2/2) \$\endgroup\$
    – AgentS
    Commented May 27, 2018 at 7:08

1 Answer 1

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This can be done with level shifting and requires a bipolar power supply. The simple sketch below illustrates this, showing only the components pertinent to this concept.

The collectors of the first differential pair (Q1 & Q2) are as you described in your question...biased above 0V. The second differential pair (Q3 & Q4) uses PNPs and its output is biased down to just above 0V. This is buffered by the emitter follower, Q5. I showed it fed back to the (-) input of the amplifier simply to illustrate the path for negative feedback.

schematic

simulate this circuit – Schematic created using CircuitLab

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  • \$\begingroup\$ Wow! If I understand correctly, first diff pair swings its output between 0 and V+, then the second diff pair swings its output between V- and 0. Just brilliant! I remember seeing two diff pairs before but never thought they do the voltage shifting. Ty :) \$\endgroup\$
    – AgentS
    Commented May 27, 2018 at 6:47
  • \$\begingroup\$ Hey @AlmostDone , Since the quiescent voltage of Q3 is 0V, at the collector of Q3, only negative voltages appear, right ? \$\endgroup\$
    – AgentS
    Commented May 27, 2018 at 8:19
  • \$\begingroup\$ You might want to fix Q1's orientattion. \$\endgroup\$
    – Andy aka
    Commented May 27, 2018 at 9:53
  • \$\begingroup\$ @Andyaka Thanks. Is there a way to edit my answer without having to redraw the circuit? \$\endgroup\$
    – AlmostDone
    Commented May 27, 2018 at 11:26
  • \$\begingroup\$ Your circuit is wrong therefore, if you want to fix it you have to edit it. \$\endgroup\$
    – Andy aka
    Commented May 27, 2018 at 11:29

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