I simulated a simple noninverting amplifier using an operational amplifier in LTspice and i was wondering about the input impedance.

enter image description here

The input impedance of a noninverting amplifier should be the input impedance of the OPA itself plus the resistor to ground. The OPA I'm using (LT1014) should have an input resistance of 4 GOhm in common mode or 300 MOhm in differential mode according to it's datasheet.

But at a DC input of 0.1V LTspice shows a current of about 12nA through V3 which would suggest a resistance of just 8.3 MOhm (0.1V / 12*10^-9A).

Am I doing something wrong or what causes this huge discrepancy?

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    \$\begingroup\$ Do you distinguish between static resistance and dynamic resistance? Also, 12nA is the input bias current. \$\endgroup\$ – G36 Jun 2 '18 at 16:21
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    \$\begingroup\$ And what input resistance would you calculate for DC input of 0.0V? 12nA still flows. \$\endgroup\$ – glen_geek Jun 2 '18 at 16:23
  • \$\begingroup\$ If 12 nA flows at 0.1 V, and 12 nA also flows at 0 V, that implies a very high \$\frac{dV}{dI}\$, meaning a very high differential resistance. \$\endgroup\$ – The Photon Jun 2 '18 at 16:47
  • \$\begingroup\$ Ah if that's the input bias current does that mean it's not taken from V3 but flows out of the OPA itself (so it's drawn from the supply rails)? That would also explain the current at 0V input. And if that current isn't drawn from V3 my calculation for the input resistance would therefore be wrong. \$\endgroup\$ – zigarrre Jun 2 '18 at 16:56
  • \$\begingroup\$ That 12nA does flow through V3, and also through the DC supply (it is an almost insignificant part of total "ground" current). Be aware that a DC path must be provided for this 12nA: a series coupling capacitor going into OPA "+" or into "-" input is forbidden. A 1Mohm resistor in series with "+" input would create a 12 mV DC offset at the input, added to any inherent DC offset of about +/-50uV. \$\endgroup\$ – glen_geek Jun 2 '18 at 17:22

When you buy an op-amp (or model it) you get a bit more than most folk bargain for. This picture is just showing the input terminal stuff: -

enter image description here

Here we have: -

  • Input bias current and its friend; input offset current
  • Various input resistances (differential and common mode)
  • Input offset voltage (and its drift with temperature)
  • Various differential and common mode capacitances
  • Input noise voltage (usually specified as a density)
  • Input noise current (usually specified as a density)

Added to this is: -

  • Limited common mode input voltage range.
  • Finite common mode rejection that usually gets a lot worse at higher frequencies.
  • Bias current roughly doubling for every 10 degC rise (FET input devices).
  • Power supply rejection - noise on the power supply WILL modify the output voltage and it gets worse at higher frequencies.

And there are several non-input related limitations such as: -

  • Restricted ability to get close to either power rail.
  • Limited slew rate (the output cannot move faster than "so-many" volts per micro second).
  • Open-loop Gain falling from a finite (but usually very high value) to unity at some point (commonly between 1 MHz and 10 MHz but there will be exceptions).
  • Small signal output overshoot.
  • Inability of output to drive more than a few tens of mA.
  • Less than ideal phase margin (can lead to a linear amplifier becoming an oscillator especially with capacitive loads on the output).
  • Non-perfect channel-to-channel seperation i.e. cross-talk in multiple op-amp packages.
  • Output voltage phase reversal (due to extreme input voltages).
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    \$\begingroup\$ Where did you get that image? Seeing that ~10 years ago would have saved me a great deal of frustration. \$\endgroup\$ – Matt Young Jun 2 '18 at 17:46
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    \$\begingroup\$ @MattYoung I've quite literally just drawn it in word! \$\endgroup\$ – Andy aka Jun 2 '18 at 17:46
  • \$\begingroup\$ Great illustration. But how can R_IN and C_IN be connected to ground if an OPA typically has no (direct) connection to ground but only to the two supply rails (which often are both not at ground potential, e.g. +-15V)? You also didn't really answer my question but i think i figured it out from the comments on my question: The current I'm seeing is the bias current which is taken from the supply rails instead of the input so it's not relevant for the input resistance calculation. \$\endgroup\$ – zigarrre Jun 2 '18 at 19:45
  • \$\begingroup\$ The resistance shown is presumed to be toa point equivalent to mid rail. For capacitors it doesn’t matter where you connect them because the dc supply voltage is equivalent to an AC short circuit. \$\endgroup\$ – Andy aka Jun 2 '18 at 19:52
  • \$\begingroup\$ No, the bias current you see comes from the inputs themselves and 12 nA is the typical figure in the data sheet that has been precisely modelled in your simulation. Glen’s comment is not wrong but he didn’t explicitly explain that it comes from the power rails via the input pins to your input signal. That is how it happens. \$\endgroup\$ – Andy aka Jun 2 '18 at 19:55

Input impedance also means "how does the input capacity" demand energy from the input signal.

Some opamps have massive Cmiller input capacitance. The UA715 schematic shows bipolar cascoding to limit this Cmiller.


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