I'm having trouble trying to simulate my NMOS (FDG6301N) on LTSpice. I have a permanent error telling me

x1:ed: unknown circuit node: "nc_01". requested in behavioral source

I took the model from On semiconductor website.

You can find the model, symbol and part of my schematic here.

The full schematic can be found here.

Part of my schematic

If you need more data I can post them here.

I'm simulating this NMOS to see its linear behavior. If you know a good NMOS with a huge linear operating range you also can advise me some parts.

Thank you for your help.

  • \$\begingroup\$ was that model for ltspice or maybe some other spice dialect? \$\endgroup\$
    – PlasmaHH
    Jun 4, 2018 at 9:21
  • \$\begingroup\$ You didn't connect the 4th pin, so whatever behavioural source that makes use of that voltage cannot use it. Maybe the solution is to simply add a net, unconnected, or with a label. \$\endgroup\$ Jun 4, 2018 at 9:24
  • \$\begingroup\$ On the On Semiconductor website it was written as a PSpice model. Is it then only compatible with Orcad software ? \$\endgroup\$
    – RPerun
    Jun 4, 2018 at 9:25
  • \$\begingroup\$ @aconcernedcitizen I added a net, not connected to anything and now the Unknown Circuit node is "n005" and no more "nc_01" \$\endgroup\$
    – RPerun
    Jun 4, 2018 at 9:30
  • \$\begingroup\$ @RPerun Why not simply post, from the beginning, the whole schematic. Picture might do, for now. The error is telling you that you have a behavioural source which makes use of that node. It was nc_01 (=not connected), now it's n005 (=node), so that must be one half of the problem, you have to know where the behavioural source is. Nobody here will be able to guess unless you post everything you have. Help us help you. The model, as it is, should work in LTspice. \$\endgroup\$ Jun 4, 2018 at 9:34

1 Answer 1


It looks like, internally, the model has an E-source in the *TEMP section:

ED 101 0 VALUE {V(50,100)}

which is connected to the TEMP pin, and whose expression is, after using the expanded listing:

b:x1:§eout x1:4x x1:6x v=v(x1:1x)*v(x1:3x)

so it multiplies an internal voltage to the external one. That is supplied at the TEMP pin, and comes, most probably, from some thermal design model (heatsink, or similar). If you don't use temperature, then simply ground that pin, else you can supply the temperaure (probably in oC, as Volts, e.g. 58oC = 58V).

  • \$\begingroup\$ Thank you very much dear concerned Citizen :) As I said in the question I'm looking for a good linear NMOS to control tension on the O_MOS node, if you know one can you advise it to me ? If no, anyway, you helped me find a solution to my main problem. \$\endgroup\$
    – RPerun
    Jun 4, 2018 at 9:52
  • \$\begingroup\$ @RPerun You might want to look into JFETs, though they come with their own drawbacks. However, this is another question. \$\endgroup\$ Jun 4, 2018 at 10:24

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.