# How to select correct Tpd values to use from Datasheet?

I'm trying to work out worst-case propagation delays for an address-decode circuit I'm designing. I'm looking at the datasheet for a 74HC00N, and I'm confused by the propagation delay (tpd) values on p6 of the datasheet:

Focusing on the Vcc=4.5 V section, there are three lines:

• TA=25˚C
• SN54HC00
• SN74HC00

I understand that the first line is indicating values where the ambient temperature is 25˚C, and the the next two lines are values for the two IC versions covered by the datasheet (54xx and 74xx). But one of these things is not like the other. If I'm using the SN74HC00, the datasheet says that the max tpd is 23ns. So when does the 18ns tpd value apply? The only explanation I could think of is that at TA=25˚C, both the 54xx and the 74xx versions exhibit the 18ns max, but above 25˚C, the max values diverge to the other values listed. Is that the correct interpretation?

• That is correct. Jun 5, 2018 at 11:37
• Note that instead of using discrete logic, depending on the space/power/cost constraints, a faster/more flexible solution could be to use programmable logic. Jun 5, 2018 at 14:06
• @crj11 that's a great point. This is a personal learning project to design and build an 8-bit computer, so I was limiting myself to 65cxx chips and 74xx logic chips as a design constraint. But PLDs have been around since the late 60s. The C-64 used a PAL for all sorts of device address decode logic. I am using only new (currently produced) parts; perhaps if I stick to thru-hole components it will still be in the spirit of the thing. Jun 6, 2018 at 1:57
• @JasonClark If you want to use vintage parts, the 16V8 type parts would be a good start. The big problem there is that the older PLDs require a separate programmer to program them before mounting them on the board. Modern parts can be programmed in circuit via a JTAG interface. As long as you have the space and the prop delays are not an issue, the discrete logic is probably easier to deal with. Of course if you get a really big CPLD or a small FPGA, you could put the whole CPU inside it like hackaday.com/2014/08/16/an-fpga-based-6502-computer . Jun 6, 2018 at 2:35