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I have the following circuit which amplifies a 50 KHz signal and works ok. I would like to increase the gain of the second stage (by making R3 smaller), but when I do the output of the second stage is pulled upto 5V.

There appears to be a small DC voltage being amplified. I though the 680pF capacitor would filter this out, so only the AC component was amplified, the 680pF doesn't seem to help.

Is there a better was I can remove any DC offset at the input to the second stage?

Thanks

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UPDATE: First op-amp output distortion

I have attached two scope images which are both of the output of the first amplifier while experimenting with R3/R4 values. The distorted signal is when the gain of the second amplifier is set to 75 (R3 = 6.8K, R4 = 510K), the clean signal is with a gain of 5 (R3 = 100K, R4 = 510K).

How would the operation of the second op-amp at different gains effect the input signal?

enter image description here

enter image description here

Thanks for the responses all. I have found that adding a 10uF ceramic capacitor in parallel with R6 has improved the circuit massively in my case. This has stabilised the DC offset that is used by both op-amps.

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    \$\begingroup\$ that 680pF is all you need to remove DC from the second stage. If it's not working, it's a dud. Remove R3 and the 680pF, and observe the output voltage. That's what the DC output should be with both R3 and 680pF in place, if the 680pF is working properly. \$\endgroup\$ – Neil_UK Jun 6 '18 at 13:51
  • \$\begingroup\$ My first suspect of saturation voltage at the output is usually something that went wrong in the feedback path (ie. around R4). Definitely check that everything's connected there as well. \$\endgroup\$ – Sven B Jun 6 '18 at 13:53
  • \$\begingroup\$ Why are you using such large resistor values (50k, 1 meg); why not 5k and 100k? \$\endgroup\$ – LvW Jun 6 '18 at 13:53
  • \$\begingroup\$ Thanks for the feedback. Would lower value resistors improve the circuit? \$\endgroup\$ – Phil Jun 6 '18 at 14:23
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    \$\begingroup\$ What op-amps are you using and what supplies are they using? \$\endgroup\$ – Andy aka Jun 6 '18 at 14:26
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There should be no change to the DC output voltage of X2 when you reduce R3. Either the 680p cap is shorted or there is some other difference not shown on the schematic. The offset should be dominated by the bias current x 1M, approximately.

Edit:

Given the very low typical bias current of the TSV992IST op-amp you are using, the offset will be dominated by Vos of the op-amp. Output offset (relative to junction of R5/R6) should be significantly less than 10mV at or relatively near room temperature with that circuit.

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