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schematic

simulate this circuit – Schematic created using CircuitLab

Instrumentation: Hewlett Packard 8116A Pulse/Function Generator stanfor reserch system lock in amplifier SR830 Transistor: Indium Gallium Zink Oxide 320/20

objective: Measure the capacitance of the gate dielectric as a function of VG

Firstly I USED a Source measuring Unit to perfor DC current characterization to verify that the transistor is working correctly.

I did 6 scans, changing Vgate of 1. then scanned through Vdrain and registered the data. Here i'm plotting ID/VD to show the output characteristics. enter image description here

We then performed a similar scan: with VD=0.1 and VD=5, scanning over VG, to get the transfer characteristics. this one didn't come out as we expected. enter image description here we expected a clear increase in ID at a certain value of VG, as it starts to conduct.

At this point I wanted to characterize the capacitance that forms between the gate electrode and the channel. We used AC voltage (from the function generator) and applied it to the gate. We had a Source and drain connection going out from which we measured current aplitude and phase (with a current amplifier and a lock in amplifier)

We did this at different DC VOltage offsets because Ctot=Cpar+C and Cpar is not affected by different DC voltages.

i'm not sure how to change the circuit or which symbol represents my transisoro/curicuit better. i hope this is enough detail

I have this set of data, and I need to find the capacitance.

-Amplitude input(V)= 3 -Frequency (kHz)=10 - Offset (V)= -6 +0.4 until 4.1

  • Amplitude lock =196.48, 197.7 201.1, 209.4, 222.6, 240.2, 268.3, 290.8, 313.7, 334.9, 352.3, 368.6, 366.8, 368.5, 369.5, 370.4, 371, 371.3, 371.7, 372, 372.2, 372.4, 372.5, 372.6, 372.7, 372.8, 372.9, 373, 373.1, 373.2, 373.3, 373.4, 373.5, 373.6, 373.7

  • Phase (degrees)= -99 basically always +-1

I've never drawn a circuit before, so didnt know how to insert a lock-in. Now, i basically think that the Capacitance can be calculated from Z=1/(CwJ) where i Know W for sure. however i'm not sure about the rest.

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  • \$\begingroup\$ This is not remotely enough information. Expect it to be closed soon unless you provide much more. \$\endgroup\$ – WhatRoughBeast Jun 6 '18 at 14:05
  • \$\begingroup\$ what kind of information? \$\endgroup\$ – leo electrics Jun 6 '18 at 14:10
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    \$\begingroup\$ all that you can give about where that data comes from, how it was measured, what device under test is… \$\endgroup\$ – Marcus Müller Jun 6 '18 at 14:14
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    \$\begingroup\$ Why do you keeeeeeep repeating letters like "V V" and "kHz kHz"? Try formatting your question so that it doesn't look like a jumble of randomness. \$\endgroup\$ – Andy aka Jun 6 '18 at 14:24
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    \$\begingroup\$ Also, you are not actually asking a question... \$\endgroup\$ – Daniel Jun 6 '18 at 14:46
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You are not asking a question per se, but are puzzled by the results. You should not be. Look at the distortion suddenly appear when Id is down to 1 nA or so, and then flat-lines below that.

All transistors have a minimum drain or collector current, regardless of drive voltage or current, where the basic atomic structure no longer allows electrons to flow. They are semi-conductors after all, which means they have a minimum current as well as the more obvious maximum current, even a pulsed current limit.

Look up these details on the datasheets for a given transistor, and it will list the minimum cut-off current where it will no longer conduct current. I am surprised to see it working down to tens of nano-amps.

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  • \$\begingroup\$ ok, so is it possible to estimate the threshold from the graph? i was thinking that ID would drop to 0 so i could get the threshold value, but it doesn't seem like the case here \$\endgroup\$ – leo electrics Jun 9 '18 at 16:50

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