I am looking at some VHDL code and the following lines are present:
type obj_code_t is array(integer range <>) of std_logic_vector(7 downto 0);
OBJ_CODE : obj_code_t;
What does the
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The "array(integer range <>)" syntax is used to declare an array with an unconstrained length.
See this page for detailed info on VHDL ranges. Some snippets from the page are shown below.
An example of an unconstrained array definition: