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I'm currently into designing passive LP filters such as RC topology and active filters such as Sallen-Key topology.

I'm fully aware that what matters in the choice of values for the resistors and the capacitors is their product so increasing one will result in decreasing the other in order to keep the same cut-off frequency.

What I have trouble with is knowing whether I should chose my capacitor first and adjust the resistor or the opposite. And for each option, how should I chose the component's value.

I'd like to know if there's any rule of thumb to chose quickly the values for my filters, knowing the impedance of the load or other parameters.

For example, I'm currently designing a filter (active or passive) for a PWM running at around 10kHz and I want my cut-off frequency to be around 1kHz, the load having an impedance of around 100 kOhms.

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  • \$\begingroup\$ What's the source impedance? \$\endgroup\$ – Andy aka Jun 7 '18 at 9:20
  • \$\begingroup\$ @Andyaka the source can be directly the output of a MCU so rather low. Using an op-amp buffer to have very low impedance can be considered. \$\endgroup\$ – J. K. Jun 7 '18 at 9:50
  • \$\begingroup\$ Specifically which filter are you considering? \$\endgroup\$ – Andy aka Jun 7 '18 at 9:59
  • \$\begingroup\$ @Andyaka Right now, I'm working with either a simple RC filter with possibly input and output buffer or a Sallen-Key topology with possibly input buffer. However, I'm not looking especially for an answer to those particular filters but more for a set of guidelines that I could use in all my filter designs, depending on source/load impedance and other parameters. \$\endgroup\$ – J. K. Jun 7 '18 at 10:05
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You need to take account of filter source impedance and filter load impedance: -

enter image description here

At high frequencies, the loading impedance of a filter on the signal source can be onerous. Typicaly for an RC low-pass filter, the impedance seen by the source will be "R" at high frequencies so, make sure "R" is big enough to not cause errors due to excessive loading. If an MCU pin is the source then it will be typically around 10 to 100 ohms output impedance. This means you should use a value of "R" that doesn't create a problem. Possibly 1 kohm to 10 kohm.

Given that the load might be 100 kohm, and "R" might be 1 kohm, there would be a potential-divider error of 1% and this may not be a problem. However, if "R" is 10 kohm then there will be a potential-divider error of 10% and this could easily be a problem.

So, choose "R" first in order to match the source and load impedances and if this cannot be adequately met then you need to consider an output buffer.

Clearly if a Sallen-key design is used you get an output buffer for free and, assuming the load is 1 kohm or greater, the op-amp will handle it. You still have to consider the input loading effects though because like the simple RC filter, at high frequencies the input impedance is the first resistor seen by the source (R1 below): -

enter image description here

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  • \$\begingroup\$ That is the perfect answer I was looking for ! If I understood well, the resistor is the component that will the most effect in term of signal integrity so it is better to chose it first and then adjust the capacitor regarding the desired cut-off frequency and availability/price of components. If I'm using both input and output buffer, is there still a reason to prefer chosing the resistor first ? \$\endgroup\$ – J. K. Jun 7 '18 at 10:25
  • \$\begingroup\$ An input signal buffer may still have a fairly non-trivial output impedance and may not like to be loaded by "R" too much so it's best to be a little careful about making "R" too low but, given you might use an output buffer (certainly not always needed) you have scope to choose a wide range of possibilities for "R" hence "C" has more options in value. \$\endgroup\$ – Andy aka Jun 7 '18 at 10:29
  • \$\begingroup\$ J.K, be aware that the high-frequency attenuation of the S+K structure is worse in comparison to other topologies. This is due to a direct coupling effect via C1 to the finite output impedance of the opamp. This problem is covered in detail in the mentioned TI paper (sloa024b) \$\endgroup\$ – LvW Jun 7 '18 at 10:31
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Sallen-Key filters are very gain-sensitive! That means: A small deviation from the required (fixed and finite) closed-loop gain Acl of the active stage will cause relatively large deviations of the desired Q-factor of the filter.

Therefore, two Sallen-Key alternatives are preferrable: Acl=1 (feedback path is a short) or Acl=2 (two identical resistors in the feedback path). Do not use the "equal-component" form of the Sallen-Key structure (R1=R2, C1=C2) because the required gain value is uneven (not easy to realize).

For designing the passive RC-network follow the recommendations mentioned in the other answers.

Recommandation (edit):

1) Unity-gain version: In case of Butterworth response (Q=0.7071), two equal resistors are possible (capacitor ratio of 2)

2.) For gain-of-two (Acl=2): Two equal capacitors are possible (for all Q values)

3.) When a second opamp is available, you can decouple the first node from the rest. In this case, you can use two unity-gain amplifiers and have the same properties/advatges as in case 2) (equal capacitors).

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  • \$\begingroup\$ Thanks for your answer. I found this paper (ti.com.cn/cn/lit/an/sloa024b/sloa024b.pdf) that raise the same issue you're talking about however I have the feeling that they do not provide with any general conclusion on what is better. Maybe there is no general rule but I don't know, it is the exact reason why I opened this topic. \$\endgroup\$ – J. K. Jun 7 '18 at 10:09
  • \$\begingroup\$ I guess there are more than 20 different active filter structures - and it is not possible to say which one might be "better". Everything is a trade-off - as always in electronics - between conflicting requirements (parts count, passive or active sensitivities to tolerances/simplifications, power requiremets, required space, exactness, frequency range, tuning requirements,...). Hence, to find a suitable filter topology for a specific application is a challenging task. \$\endgroup\$ – LvW Jun 7 '18 at 10:23
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It depends a lot on topology and also on other factors like getting a reasonable input (and sometimes output) impedance, and capacitor types. For most well known topologies there are "cookbook" equations that you can use, or you can work things out by modeling.

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You should choose components which are available for you at a reasonable price and accuracy. Big caps might not function as a cap above the self-resonance frequency caused by the inductances of the leads.

I would also consider the current capability of your source. It will behave as an ideal voltage source - I assume you have a voltage-to-voltage filter - as long as its output impedance is much lower than the load presented by the filter.

If your topology does not have a low output impedance, i.e. you have no opamp at the output node, you should also take into account the load in your calculation.

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  • \$\begingroup\$ Thank you for your answer. For Sallen-Key topology, I assume that the impedance of the load will not be a problem as the output impedance of the filter will be really low. But does the impedance of the source has to be taken into consideration ? I planned to use directly the output of a MCU but I can use an op-ap as a buffer between the MCU and the filter stage as well. \$\endgroup\$ – J. K. Jun 7 '18 at 9:53

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