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I have looked at how the Sigma-Delta ADC works and I understand it. However, it seems to me that there is not a lot of literature about the Sigma-Delta DAC.

I want to build a model of it in Simulink. Can someone explain to me how it works?

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  • \$\begingroup\$ A delta-sigma system is a mixed digital-analog feedback system, and you the designer get to pick what is analog, what is digital, and if you have ONE feedback point or TWO feedback points, and how many feedFORWARD points. \$\endgroup\$ – analogsystemsrf Jun 9 '18 at 5:13
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The DAC is simply the feedback portion of the ADC. The basic concept is illustrated here:

schematic

simulate this circuit – Schematic created using CircuitLab

The contents of the dashed boxes is identical at both ends. On the ADC side, the feedback insures that the stream of one-bit samples creates a replica of the analog input signal. If this is successful, then the same data stream and the same circuit on the DAC side will create the exact same replica.

The subtlety comes in when you don't want to transmit the raw stream of 1-bit samples, but instead want to transmit a more conventional PCM data stream. The box marked "transmission system" must encode the 1-bit stream into a series of PCM words on the input side, and then convert those words back into a 1-bit stream on the output side.

The conversion to PCM consists of applying a digital low-pass filter to the input stream, and then decimating the resulting stream of output words. As long as the sample rate of the decimated stream meets the Nyquist criteria for the filter bandwidth, no information is lost.

The conversion from PCM to 1-bit samples uses a digital form of the feedback loop used in the ADC. The stream of PCM words is oversampled, and then a quantizer produces 1-bit samples based on whether the feedback is greater or less than the current input word.

The block diagram of the transmission system looks something like the above diagram with the two sides swapped:

schematic

simulate this circuit

The decoder is an all-digital form of the delta-sigma modulator used in the ADC. Note that the output of the decoder is not necessarily an exact replica of the original 1-bit stream, but it contains the same information.

This is a powerful concept. Whenever I need an analog output from an FPGA — for example, to control a VCXO — I frequently use such a modulator to drive an external passive or active LPF.

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  • \$\begingroup\$ Thanks for the answer Dave. The answer seems convincing to me but I could not understand the input portion of the first figure. The input analog signal does not go the comparator directly in a classical Sigma-Delta block diagram. However, The DAC feedback and analog input goes through integrator chains and it reaches comparator. But I am trying to understand what you are trying to say, but the input portion puzzles me. Could you give a hint on the input structure? \$\endgroup\$ – sundar Oct 5 '18 at 17:00

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