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I'm trying to register an SPI device to my Angstrom Linux (kernel version 3.10) in order to use an ADC chip (LTC2258) for my custom board. Processor that I2m using is Cyclone V, and FPGA handoffs seems correct (SPI Master 1 is given to HPS). So, I edited my .dtb file like this:

        spi@0xfff01000 {
        compatible = "snps,dw-spi-mmio-15.0", "snps,dw-spi-mmio";
        reg = <0xfff01000 0x100>;
        interrupt-parent = <0x3>;
        interrupts = <0x0 0x9b 0x4>;
        clocks = <0x21>;
        #address-cells = <0x1>;
        #size-cells = <0x0>;
        bus-num = <0x0>;
        num-chipselect = <0x4>;
        status = "okay";

        spidev@0 {
            compatible = "spidev";
            reg = <0x0>;
            spi-max-frequency = <0x5f5e100>;
        };

    };

At kernel boot, it only says this about SPI:

root@cyclone5:~# dmesg | grep -i spi 
[    0.652554] dw_spi_mmio fff01000.spi: master is unqueued, this is deprecated

But spidev0.0 entry appears under /dev. With default spidev_test program, I see this output:

root@cyclone5:~# ./spi_d -D /dev/spidev0.0 
spi mode: 0
bits per word: 8
max speed: 500000 Hz (500 KHz)

FF FF FF FF FF FF 
FF FF FF FF FF FF 
FF FF FF FF FF FF 
FF FF FF FF FF FF 
FF FF FF FF FF FF 
FF FF FF FF FF FF 
FF FF 

And there is the thing: SPI interface of that ADC is used for configuration. So, the test case for me is to write configuration values to registers with given addresses, and successfully read them back. So, I modify the tx buffer from the source code; I write and read back the registers. But it gives me the same result, full FFs.

In ADC's datasheet, it says:

  • Data is written to a register with a 16-bit serial word. Data can also be read back from a register to verify its contents.
  • The fi rst bit of the 16-bit input word is the R/W bit. The next seven bits are the address of the register (A6:A0). The fi nal eight bits are the register data (D7:D0). If the R/W bit is low, the serial data (D7:D0) will be writ- ten to the register set by the address bits (A6:A0). If the R/W bit is high, data in the register set by the address bits (A6:A0) will be read back on the SDO pin

So, I modified the code accordingly. I use my modified spidev_test with these parameters:

./spi_d2 -D /dev/spidev0.0 -b 16 -s 100000000

But as I've said before, result is full ones. Also, changing bits per word parameter does not affect the result.

How can I debug this? Where should I look? Any help is appreciated. Thanks in advance.

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    \$\begingroup\$ Just in case... Have you confirmed your SPI protocol for your terminal/SW and the device matches? SPI is not a standard (e.g. IEEE) and, as such, requires some parameters be set, usually. Maybe spi mode: 0 does that for you(?) \$\endgroup\$ – CapnJJ Jun 11 '18 at 15:50
  • \$\begingroup\$ @CapnJJ Yes, I have. Actually, I changed them randomly to see the reaction. But nothing changed. \$\endgroup\$ – ddyn Jun 12 '18 at 6:56
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Connect a logic analyzer or scope to see that the signals are actually changing (CS, SCK and MOSI), then connect MOSI to MISO to see that you can receive what you are sending. Stable 0xFF or 0x00 usually indicates that the line is stuck and not connected anywhere.

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  • \$\begingroup\$ Unfortunately, I cannot do that for now since I have no access to these equipments and the SPI lines are not reachable for probing. As soon as I find a way, I will try probing and MOSI-MISO loopback. Thanks! \$\endgroup\$ – ddyn Jun 12 '18 at 7:25
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It turned out that I was misinformed about the chip select pin of the ADC. Changing spidev child node's reg value to 1 solved the problem. Final parameters I use are:

./spi_d -D /dev/spidev0.1 -b 16 -H -O

Sorry for wasting your time and thanks for your help!

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Ensure clock speed is no faster than 25MHz (from datasheet) and clock polarity and phase is set correctly (CPOL = 0, CPHA = 0)

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