This is probably relevant for all SPI compatible chips but I'm asking for the DRV8711 in particular. The data sheet lists the SPI timing requirements and I was wondering how to get the maximum data rate supported by the device. The host MCU is STM32F103C6 and it needs to set a prescaler value to set the data rate.

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  • 3
    \$\begingroup\$ Min clock cycle time = 1/max frequency \$\endgroup\$
    – Eugene Sh.
    Jun 14 '18 at 18:26
  • \$\begingroup\$ Right, so the max frequency is 4MHz. So data rate is 4Mbits/s? \$\endgroup\$ Jun 14 '18 at 18:30
  • 1
    \$\begingroup\$ Yes. The maximum data rate. \$\endgroup\$
    – Eugene Sh.
    Jun 14 '18 at 18:32
  • 1
    \$\begingroup\$ @Eugene As short as it is, it is an answer. \$\endgroup\$
    – dim
    Jun 14 '18 at 18:33
  • 1
    \$\begingroup\$ Um.. ok, will refine and post.. \$\endgroup\$
    – Eugene Sh.
    Jun 14 '18 at 18:34

In SPI each bit is transmitted on a clock edge, therefore the data rate (in bits) is the same as the clock frequency. Your datasheet is not providing the maximum frequency, but it is providing the minimum cycle time, which is \$250ns\$. As we know the relation between frequency and period time is \$f=1/T\$, we can calculate the maximum frequency as $$ f_{max}=\frac{1}{T_{min}}=\frac{1}{250ns}=4MHz$$

So the data rate is 4Mbits/s.

Note, this is including any protocol overhead bits transmitted, such as framing information, parity bits and idle cycles. So the actual data encoded will have a lower rate.


From your question I assume that you are new to low level inter chip communication protocols in general and SPI in particular, so I'll try to explain some basic stuff that is not directly apparent from reading the datasheet.

The simple

The SPI protocol does not actually define clock rates - this is always left to the chip designer. But although the formula \$ f= 1/T \$ is always true in the case of SPI you should look at the broader picture: $$ \frac{1}{t_{CYC,MAX}} < f_{clock} < \frac{1}{t_{CYC,MIN}}$$ But notice how the datasheet only defines the minimum clock cycle and leaves the maximum blank. This goes to mean that you can put any value higher than the minimum in there, and it will still hold.

It should have had the value of \$ \infty \$, but since you can not normally divide by infinity they choose to not break the math.

What this means for you is the above formula, approximately, translates to $$ \frac{1}{\infty} < f_{clock} < \frac{1}{250 ns}$$ with the final result being $$ DC < f_{clock} < 4 MHz$$

The strange

Now, unless you really, really know what you are doing and that you absolutely need this you should never run your clocks at the maximum specified frequency.

I will assume you are deriving your clock from a regular, non-ovenized and non-temperature compensated crystal. If you, for some reason, are using an RC circuit for this then the effect described are even worse. If you have a good atomic clock as your reference than you can ignore the below two paragraphs...

The clock source you use is not accurate, nor stable. It changes its operating frequency with age, due to temperature changes and your supply voltage being unstable and noisy. Even worse, Quartz crystals can react to speach, a truck passing by or you tapping on the table.

What this means at the end of the day is that if you design for \$ f_{max} \$ then even the slightest disturbance in the environment can cause your system to go out of spec. In your case: \$ f_{clock} > 4 MHz \$ !

At this point funky things start to happen, ranging from your system working as expected or even better and up to it creating a small black hole and eating all the money you spent on the project.

So always keep a hefty safety margin!

Now regarding this specific devices' (albeit the next trait is shared among most SPI devies) communication protocol. You should note section 7.5.1 on page 25 and figure 17 on page 26: "To complete the read or write transaction, SCS must be set to a logic 0". And looking at item 6,7 & 8 from section 6.6 it seems you need to add another clock cycle with the CS being low. I would add at least two if I were you.

The slow

But now comes the most interesting part: are you sure you need all that speed? The table at section 6.7 tells us that the maximum step frequency is 250 kHz. That is, not matter what you do you can not change the position of your motor faster than 250,000 times per second.

Moreover, if you consider that the SPI clock is a bit clock, and you need to send 16 bits of data plus an extra clock when the CS is low, you will see that you can not write to the configuration registers faster than \$ 4 MHz / 17 \approx 235 KHz < 250 KHz\$.

At this point you might have one of several reasons to still want to run your SPI at maximum speed:

  1. You want to read the status register to detects stalls and other problems ASAP.
  2. You want to do an "extra-smooth motion profile" (section 7.1 page 10) by constantly changing some configuration.
  3. You need really fast start times

If you do not need to do any of the above I would just set the SPI clock to a value of several KHz, since you will only be using it once after power-up to do some settings.

The unknown

Regarding the pre-scaler setting in the micro controller: Since you did not write what is the frequency of your clock source and how your clock tree is configured I can help you with that one.


Whatch out for the SPI mode!


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