# Using LTSpice to find the gain of NPN-PMOS folded cascode

I am trying to use LTSpice to find the gain of NPN-PMOS folded cascode. Below is the question prompt:

In the problem, the parameter specifications are as follows: $$\beta =100,\:V_A=5V\:,\:I=0.1mA,\:V_{ov}=0.2V$$ Now assuming some parameter sources like VCC=5V and vtp = -0.5V, we get VG = 4.3V. Using the voltage division properties for biasing by choosing some resistor values, the calculations result in the following voltage dividers for NPN and PMOS. Also, Vb for the NPN is 0.7V since it is a common source.

Now, I had to play with the circuit for quite sometime and the above seems to be the best so far. However, It is not correct. My gain is supposed to be Av=-10K V/V, so if am putting vi=0.005V, I should get vo=50V with a 180 degrees phase shift. Unfortunatley, I am not getting the required output. My output is not even oscillatory, it is a constant voltage of about 5V like below:

Can somebody please tell me what am doing wrong or how to properly build the circuit in LTSpice to get the required output?? thank you in advance.

• @Raykh Your BJT collector is isolated from your FET by the infinite impedance of a current source (I1) that you decided to just plop in there because that's what you think the current should have divided out to be. Do you NOT see why this is a huge problem? I don't care about your earlier problems (simulation slowness, or anything else.) There is a huge problem here. – jonk Jun 18 '18 at 7:26
• @Raykh But this isn't an LTspice problem. This is a user problem. All Spice simulators would fail to do what you want, fed this schematic. Also, why do you think there is a lambda parameter for an NPN? – jonk Jun 18 '18 at 7:32
• @Raykh I said I'm ignorant and no expert on LTspice. No idea where you are coming from since I'm actually sincerely trying to see if there is some way I may be able to help. I'll assume it's not wanted and will step aside and allow someone else the privilege. But I will leave you with the fact that you have little place to speak, given the LTspice schematic you posted. It's not even close. – jonk Jun 18 '18 at 8:38
• @Raykh Congratulations, your creed that you're doing everything right made you blind towards jonk's help, or anyone else's. 1) Trace the path of the signal from input to output, see what's wrong. 2) If the input is 5mV and the gain 10k, then the output should be 50V, which is 10x above the supply you're using. 3) You should generally start from the logic of: "if I am asking, I am the one who should listen in order to reason", but this is off-topic on ee.se, so feel free to ignore it (which I am sure you will). – a concerned citizen Jun 18 '18 at 9:35
• @Raykh No, you are the one who wants to play smart by dismissing helpful comments and downplaying all the other's efforts, because you're so sure you are not wrong (sign of narcissism). Everybody told or hinted at you very nicely that you are making mistakes, and to all you replied "no, I am not". For this, and for your slimey attitude (blame LTspice, when told that's not to blame, blame something else), you get -1 from me, and I don't have itchy fingers. – a concerned citizen Jun 18 '18 at 17:10

Your circuit has nothing to do with folded cascode. It looks like to me that you completely do not understand how folded cascode amplifier work. Or even how amplifier work.

Can you show me the signal path for a signal in your simulation?

Also, you have some problems with the basics of electronics and how it relates to a real world. It is impossible to get a gain of 10kV/V in this circuit in real-life (50V at the output from 5V supply?).

The corrected circuit may look like this:

And the small signal parameters:

$g_{m1} \approx \frac{100\mu\textrm{A}}{25\textrm{mV}} \approx 4\textrm{mS}$

$r_{o1} \approx \frac{5\textrm{V}}{0.1\textrm{mA}} = 50\textrm{k}\Omega$

To found the MOSFET transconductance we need to solve for Vgs:

$$I_D = \frac{K_P}{2}(V_{GS} - V_T)^2 \cdot (1 + \lambda \cdot 2V_{GS})$$

2Vgs because I use R1 = R2 hence Vds = 2Vgs

And the solution for this for $I_D = 100\mu\textrm{A}$ and $KP=5\textrm{m}$ is $V_{GS} = 0.6774\textrm{V}$

Now I can find the MOSFET transconductance as:

$g_{m2} = \frac{2I_D}{V_{GS} - V_T} \approx 1.3\textrm{mS}$

And

$r_{o2} = \frac{V_A + V_{DS}}{I_D} \approx 63.5\textrm{k}\Omega$

And to find the theoretical voltage gain it is better to proform AC-sweep analysis in LTpsice. Set AC input source to 1V and plot Vout in linear scale. Because in AC analysis power supply limitation don't exist.

Also, for a BJT to model the Early effect we are using VA parameter not lambda. Lambda is reserved for MOSFET lambda = 1/VA.

• Well you did achieve a gain of about 13K V/V, which is kinda close to 10K V/V. Secondly, I am a beginner in LTSpice and the problem I posted is for an IC circuit for which the book does not provide any biasing arrangements – Raykh Jun 18 '18 at 16:14
• But you must understand that the problem is not in LTpice. Your circuit is wrong. One question: Can you explain to me "how" Vi source influence the MOSFET circuit? Which current (in mosfet) can Vi source modulated in the rhythm of an input signal? – G36 Jun 18 '18 at 16:35
• Yeah, I know my circuit is wrong and I have been trying too many things with no hope. That is why I posted the question here to get the help – Raykh Jun 18 '18 at 16:37
• @G36 Don't bother, he says LTspice is to blame, when pushed to corner and shown that LTspice is not to blame, he will blame something else, and so on, all the while pointing fingers at those that try to help by saying they are the ones not helping. – a concerned citizen Jun 18 '18 at 17:12
• @G36 Thank you very much for taking the time to provide this helpful answer. Now I can spot my error and fix my mistake. Again, thank you very much. – Raykh Jun 18 '18 at 17:25