Having no past experience on RF design i have recently taught that placing stitching vias it is a good practice. Reading the "definition" of stitching vias i am not sure that i can not distinguish stitching vias from common vias. The definition i have read is from Altium:
Via stitching is a technique used to tie together larger copper areas on different layers, in effect creating a strong vertical connection through the board structure, helping maintain a low impedance and short return loops. Via stitching can also be used to tie areas of copper that might otherwise be isolated from their net, to that net.
So my question is if there is a difference on functionality between the two types of vias?
Thank you both for the replies. You are very helpful. My design is based on RN2483 package which includes a MCU and a RF IC. If you check RN's bottom layer it is obvious (or i make a guess) where the RF IC is located because there are stitching vias.
On my PCB should i place similar vias? Here is my current layout:
Now all the vias are connected to GND on top layer. Ignore the one that is overlapping the RFH trace. Now i will add a ground plane to bottom layer as well.
I am open to suggestions/corrections because as i stated is my first RF design and i lack of knowledge.