The buffer below between the input and the opto works fine itself, but Im having problem when Im interfacing it with 4n32 on the right. (Frequency of the hardware-trigger will be around 40Hz pulse train.)

enter image description here

As you see above the buffer output v_tr_out follows the input; but the opt_output is somehow effected like capacitively(?)

Where am I doing wrong, and how can I fix this problem?


*Lowering the 100k solved the problem of capacitance.

Here is the more complete scheme with some updates!:

enter image description here (please left-click to zoom in)

And here is the module input from its manual:

enter image description here

I have learned that -TRG and RTN are isolated innerly(they are not connected) so need to be isolated.

So I use different power supplies for tigger and power inputs to the module.

V1, V2 and V3 are power supplies for trigger voltage. Vs is power supply for the input signal and buffer. Vp is the 24V power supply for all the modules.

So in other words all supplies' negative terminals are not connected to each other. V1, V2, V3, Vp and Vs do not share their negative terminals.

Modules have their own trigger input and they only share Vp which is the power supply for the module. And trigger the inputs are coming from the same circuit i.e the buffer same output called tr_in.

STP cables will be used. And the cable lengths are 5m, 20m and 60m.

Would this scheme be fine for this scenario?

  • \$\begingroup\$ Try to add a 100R resistor between 4n32 base and GND. \$\endgroup\$
    – G36
    Jun 21, 2018 at 15:34
  • \$\begingroup\$ What @G36 said, and 100K is kind of a large resistor on the output, the parasitic capacitance at opt_out will slow down the fall time as well. If you can reduce the size of that resistor your output should be faster. \$\endgroup\$
    – John D
    Jun 21, 2018 at 15:36
  • \$\begingroup\$ V(opt_out) seems reversed. Are you sure you are simulating this right? \$\endgroup\$
    – FrancoVS
    Jun 21, 2018 at 15:38
  • \$\begingroup\$ @FrancoVS makes a good point, maybe sort that out first and then see if the problem persists. If so post an update. \$\endgroup\$
    – John D
    Jun 21, 2018 at 16:44
  • \$\begingroup\$ @FrancoVS Inversion is because it is darlington \$\endgroup\$
    – floppy380
    Jun 21, 2018 at 18:41

1 Answer 1


The photo Darlington has a high CTR of 500% which after IR coupling losses is like a transistor with Beta of 5 in the saturated Vce(sat) condition with normal LED drive current range.

Yet I expect the transistors must have at least an hFE if 100*100 in linear range and 10*10 at Vce(sat) . The equivalent base capacitance is multiplied by hFE to the Emitter Follower output capacitance in the linear zone with a gain > 10k and your result of T=RC or 7ms/100k=0.07uF.

Thus you need to speed up the time constant of Re*Ceq=T by lowering Re without compromising the On state voltage more than 12V-2V expected for a Darlington.

If you defined your input/output impedance and voltage 1st and decay time in a system design spec !! Before selecting a topology or parts you will have more success. There are much faster non-darlingtons which will give a greater swing and faster response.

  • as well you can drive the IR LED cathode direct from logic with a 10mA current limiting resistor then use then control the turn slew rate so the target turns off faster with an appropriate configuration by pullup or pull down.

Thus Q1 & Q2 are redundant .

All these must go into your design spec 1st!!!

Changing R7 from 100k to 1k will see a sharp improvement at the expense of a 1V drop in ON Vce(sat) so <=10k is a suitable compromise.

Always define acceptance criteria 1st before choosing parts and any design. Then compute from datasheets if a part affects your criteria.

  • \$\begingroup\$ What is the driver? OpAmp? \$\endgroup\$ Jun 21, 2018 at 19:56
  • \$\begingroup\$ no its from a device sync output, ir cannot source more than 5mA. \$\endgroup\$
    – floppy380
    Jun 21, 2018 at 20:15
  • \$\begingroup\$ What source is it? Do you realize 60m is about 6nF and it’s effect on turn off? \$\endgroup\$ Jun 21, 2018 at 20:56
  • \$\begingroup\$ You are right I tried with 60nF in sim. To solve it I reduced R5 to 1k and the falling edges sharper now. \$\endgroup\$
    – floppy380
    Jun 21, 2018 at 22:58
  • \$\begingroup\$ So is that acceptable now? \$\endgroup\$ Jun 21, 2018 at 22:59

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