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I'm planning to design a driver for VGA connectors, and for testing purposes I have an evaluation board of one CPLD. Concretely, the board is the Digilent's CoolRunner-II with the Xilinx's XC2C256 CPLD. But my intention is to implement the driver on a custom PCB with a smaller chip, let's say fo example the XC2C64A (random CPLD I've already found), to make the PCB cheaper due to the cost of manufacturing bigger surfaces.

Can I use the CPLD I have and then, once I have tested that the design works properly, tell ISE to synthesize it for smaller CPLD models to know which one could support the design? For example, to know if it has enough capability for the size of the logic or the design overflows it, so I could estimate which CPLD I should buy later.

Probably it's not the best solution, but it would be perfect for saving money if I don't have to buy evaluation boards for the other CPLDs. What do you think?

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Can I use the CPLD I have and then, once I have tested that the design works properly, tell ISE to synthesize it for smaller CPLD models to know which one could support the design?

Yes. This is a standard design practice.

One caveat to be aware of is that a more tightly "packed" design may have different timing characteristics. If your design is operating close to timing limits on a larger CPLD, it may fail timing on a smaller part, even if it fits.

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