I was looking at this image which shows a CMOS NAND standard cell. However, how can I see this depicts a NAND?
A CMOS NAND has parallel PMOS and serial NMOS transistors but somehow I can't see this in this image. Any explaination?
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\$\begingroup\$ This is a picture of a layout of a CMOS logic cell. Unless you know how a MOSFET looks in a layout this picture is meaningless. It is like showing a schematic to someone who cannot read schematics: pointless. How such a layout relates to a schematic is explained in many books so it is also pointless to ask about that here. The procedure to determine what circuit it is is by recognizing the transistors (I see 2 NMOS and 2 PMOS) and drawing them as a schematic with the connections to the marked pins (vss, vdd, a,b,z). \$\endgroup\$– BimpelrekkieJun 25, 2018 at 19:32
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2 Answers
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I've put a picture of the ciruit below:
- blue/violet ... metal 1
- red ... polysilicon (used for the pmos/nmos gates)
- green ... n-active area
- yellow ... n-diffusion p-active area
- light blue ... p-well (the bottom large rectangle)
- light orange ... n-well (the large rectangle on top)
small rectangles ... contacts and vias to contact the different layers
A PMOS is made by drawing a red rectangle over a yellow active n-region
- A NMOS is made by drawing a red poly over green active p-region
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\$\begingroup\$ To clarify, yellow is actually a p+ diffusion that forms transistor channels when inside the n-well or VSS taps when inside the p-well. The green is a n+ diffusion that forms transistors when inside the p-well or VDD taps when inside the n-well. Also, we use the word "diffusion" when in fact these regions are probably ion implanted. \$\endgroup\$ Jun 26, 2018 at 11:35
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\$\begingroup\$ @elliot: You are right! In semiconductor processing you can dope a semiconductor by diffusion or implantation. These are 2 different physical processes. \$\endgroup\$– abu_buaJun 26, 2018 at 11:39
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At this level you're looking at the doping and metal. The serial NMOS xtors are the green area...instead of two distinct transistors, they've chosen to use the simpler layout of a single channel with two gates. The parallel PMOS transistors are in the yellow area, with either gate A or gate B allowed to open a path to the output Z.
answered Jun 25, 2018 at 19:17
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\$\begingroup\$ single channel with two gates It's actually 2 channels in series meaning 2 NMOS in series. \$\endgroup\$ Jun 25, 2018 at 19:35