I was looking at this image which shows a CMOS NAND standard cell. However, how can I see this depicts a NAND?
A CMOS NAND has parallel PMOS and serial NMOS transistors but somehow I can't see this in this image. Any explaination?
Electrical Engineering Stack Exchange is a question and answer site for electronics and electrical engineering professionals, students, and enthusiasts. It only takes a minute to sign up.Sign up to join this community
I've put a picture of the ciruit below:
small rectangles ... contacts and vias to contact the different layers
A PMOS is made by drawing a red rectangle over a yellow active n-region
At this level you're looking at the doping and metal. The serial NMOS xtors are the green area...instead of two distinct transistors, they've chosen to use the simpler layout of a single channel with two gates. The parallel PMOS transistors are in the yellow area, with either gate A or gate B allowed to open a path to the output Z.