# How must I read this MOSFET specification?

I'm looking at this datasheet, which has this graph on page 3:

The FET has an $R_{DS(on)}$ of $14 m\Omega$; how can $V_{DS}$ be > 10 V at 100 A? Shouldn't that be 1.4 V? And if it was 10 V, wouldn't the FET evaporate at 100 A = 1000 W?

• Not an answer to your question exactly... But there's a gotcha if you plan using a MOSFET with small gate-to-source voltages: electronics.stackexchange.com/a/36625/930 Pay attention to the safe operating area (SOA). – zebonaut Aug 17 '12 at 20:58

The 14 mOhm you mention is valid when Vgs >= 10V (in other words, the FET is fully turned on). The graph you show illustrates the FETs behaviour for Vgs in the range 2..8V, the range in which the FET is between fully off and fully on. In this operational mode the Isd is determined mostly by the Vgs (the FET behaves as a voltage-controlled constant current source). For this mode to work there must be a minimal Vds, otherwise that voltage would be the limiting factor for the Isd. Hence the Vds >= 10V requirement.

• But at Vgs = 6 V, Id = 110 A. If Vds > 10 V that means that Rds > 90 m$\Omega$. But fig. 3 says Rds at 6 V is 18 m$\Omega;$. – stevenvh Aug 17 '12 at 16:15
• fig. 3 is valid for Id = 72 A, apparently not for 110 A. In this region of operation a FET does NOT behave as a 'pure' resistor! – Wouter van Ooijen Aug 17 '12 at 16:27

I've seen similar curves in other publications.

From what I can gather, these curves are meant to illustrate the temperature dependency of the ohmic region $R_{DS(on)}$ for a given $V_{DS}$ and $V_{GS}$. I believe we are meant to assume that the same (unspecified) $V_{DS}$ applies for all three temperatures, and that whatever that $V_{DS}$ is, it's greater than 10V.

The reason the $R_{DS(on)}$ is higher than the $14 m\Omega$ that is stated is because the $V_{GS}$ isn't high enough to fully enhance the channel - the MOSFET is operating in the linear region.

The quoted 14 mΩ of resistance is for when the transistor is operating deep in the triode/linear region ((Vgs - Vt) >> Vds). In this instance, the channel is fully formed, and the MOSFET acts like an Ohmic resistance.

For Figure 2, the transistor is always in saturation. The transistor threshold voltage Vt is specified as 2.0 V < Vt < 4.0 V. The saturation region is defined as when (Vgs - Vt) <= Vds, and that places most if not all of Figure 2 in the saturation region. In the saturation region, the 'resistance' is higher, and it is not linear. In fact, this region of operation is much closer to being a Voltage-Controlled Current Source (VCCS).

Figure 1 can help you visualize what is going on here, although it stops at Vds = 5.0V. Visualize the lines continuing on their plotted slope, and it can be a accurate enough representation of what is actually happening at higher Vds. The slope of each Vgs plot (Amps/Volts , or 1/Ω) shows the conductance of the MOSFET at a given Vgs. The steeper the curve, the smaller the resistance. The steepest parts of the curve are where the device is in triode mode, and the flattest (flatter) parts are when the device is in saturation. The graph shown in Figure 2 would be well to the right of 5V, and solidly in the saturation region.

As for the high current figures, these are typically "pulsed" values, meaning that the device is not sustaining 1,000 W of power dissipation, but that it can survive it for maybe 3 ms (Figure 11).

The graph shows how much current you can expect through the MOSFET given Vgs. If Vgs is about 6v then you'll get approximately 120 amps through it, for example. But that graph is only valid if Vds>10v. Let's say that Vds=1.0v and Rds(on)=14mohm. In that case there will only be a maximum of 71.4 amps, regardless of Vgs. When Vds<10V then there are other things that effect the max Id current. There are other graphs that show this in the datasheet, like Figure 1 (to the left of the graph that you showed).

Now, those graphs max out at 160 amps. That sounds like a lot but that MOSFET is rated for a max of 285 amps when pulsed.

Otherwise, that notation of Vds>10v is a little weird. As you noted, if Vds was actually 10v then there would be a crazy amount of current through the MOSFET. Sometimes you just have to take datasheets with a grain of salt, and try to read between the lines. In this case, I wouldn't put too much faith in that graph other than to show you that drain current goes up very quickly once Vgs goes above some level.